TWR-K21D50M Freescale Semiconductor, TWR-K21D50M Datasheet - Page 11

• Manufacturer Part Number: TWR-K21D50M
• Description: Development Boards & Kits - ARM
• Manufacturer: Freescale Semiconductor

Specifications of TWR-K21D50M

• Rohs: yes
• Product: Development Boards
• Tool Is For Evaluation Of: MK21DN512VMC5
• Core: ARM Cortex M4
• Interface Type: USB
• Operating Supply Voltage: 1.8 V/3.3 V
• Description/function: TWR-K21D50M MCU module is designed to work either in stand-alone mode or as part of the Freescale Tower System
• For Use With: Freescale Tower Systems

Cortex Debug Connector
The Cortex Debug connector is a 20-pin (0.05") connector providing access to the SWD, JTAG, cJTAG, and EzPort
signals available on the K21 device. The pinout and K21 pin connections to the debug connector (J1) are shown in
Table 2.
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
6.7 Accelerometer
An MMA8451Q digital accelerometer is connected to the K21DN512VMB5 MCU through an I
and GPIO/IRQ signals (PTB0 and PTB1).
6.8 Potentiometer, Pushbuttons, LEDs
The TWR-K21D50M also features:
-
-
-
a potentiometer connected to an ADC input signal (ADC0_SE12).
two pushbutton switches (SW2 and SW3 connected to PTC7 and PTC6, respectively)
four user-controllable LEDs connected to GPIO signals (optionally isolated using jumpers):
Function
VTref
TMS / SWDIO
GND
TCK / SWCLK
GND
TDO / SWO
Key
TDI
GNDDetect
nRESET
Target Power
TRACECLK
Target Power
TRACEDATA[0]
GND
TRACEDATA[1]
GND
TRACEDATA[2]
GND
TRACEDATA[3]
o Green LED (D5) to PTD4
o Yellow LED (D6) to PTD5
o Red LED (D8) to PTD6
o Blue LED (D9) to PTD7
TWR-K21D50M Connection
3.3 V MCU supply (MCU_PWR)
PTA3/UART0_RTS_b/FTM0_CH0/JTAG_TMS/SWD_DIO
GND
PTA0/UART0_CTS_b/FTM0_CH5/JTAG_CLK/SWD_CLK/EZP_CLK
GND
PTA2/UART0_TX/FTM0_CH7/JTAG_TDO/TRACE_SWO/EZP_DO
―
PTA1/UART0_RX/FTM0_CH6/JTAG_TDI/EZP_DI
PTA4/FTM0_CH1/MS/NMI_b/EZP_CS_b
RESET_b
5 V supply (via jumper J6)
PTE0/mADC0_SE10/SPI1_PCS1/UART1_TX/TRACE_CLKOUT/I2C1_SDA/RTC_CLKOUT
5 V supply (via jumper J6)
PTE4/LLWU_P2/SPI1_PCS0/UART3_TX/TRACE_D0
GND
PTE3/ADC0_DM2/mADC0_DM1/SPI1_SIN/UART1_RTS_b/TRACE_D1/SPI1_SOUT
GND
PTE2/LLWU_P1/ADC0_DP2/mADC0_DP1/SPI1_SCK/UART1_CTS_b/TRACE_D2
GND
PTE1/LLWU_P0/mADC0_SE11/SPI1_SOUT/UART1_RX/TRACE_D3/I2C1_SCL/SPI1_SIN
TWR-K21D50M Tower Module User’s Manual
Table 2. Cortex Debug connector
Page 11 of 16
2
C interface (I2C1)