MA240029 Microchip Technology, MA240029 Datasheet - Page 72

• Manufacturer Part Number: MA240029
• Description: Daughter Cards & OEM Boards PIC24FJ128GA310 Gen Purpose PIM
• Manufacturer: Microchip Technology

Specifications of MA240029

• Rohs: yes
• Product: Daughter Cards
• Core: PIC
• Description/function: Plug-in module
• Interface Type: I2C, SPI
• Tool Is For Evaluation Of: PIC24FJ128GA310
• For Use With: Explorer 16 Development Board

correspond to the upper words of the program memory.
PIC24FJ128GA310 FAMILY
4.3.3
The upper 32 Kbytes of data space may optionally be
mapped into any 16K word page of the program space.
This provides transparent access of stored constant
data from the data space without the need to use
special instructions (i.e., TBLRDL/H).
Program space access through the data space occurs
when the MSb of EA is ‘1’ and the DSRPAG<9> is also
‘1’. The lower 8 bits of DSRPAG are concatenated to the
Wn<14:0> bits to form a 23-bit EA to access program
memory. The DSRPAG<8> decides which word should
be addressed; when the bit is ‘0’, the lower word and
when ‘1’, the upper word of the program memory is
accessed.
The entire program memory is divided into 512 EDS
pages, from 200h to 3FFh, each consisting of 16K words
of data. Pages, 200h to 2FFh, correspond to the lower
words of the program memory, while 300h to 3FFh
Using this EDS technique, the entire program memory
can be accessed. Previously, the access to the upper
word of the program memory was not supported.
TABLE 4-38:
EXAMPLE 4-3:
DS39996F-page 72
Note 1:
; Set the EDS page from where the data to be read
;Read a byte from the selected location
;Read a word from the selected location
;Read Double - word from the selected location
(Data Space Read
mov
mov
mov
bset
mov.b
mov.b
mov
mov.d
Register)
DSRPAG
2FFh
3FFh
200h
300h
000h
When the source/destination address is above 8000h and DSRPAG/DSWPAG is ‘0’, an address error trap
will occur.
READING DATA FROM PROGRAM
MEMORY USING EDS
#0x0202 , w0
w0 , DSRPAG
#0x000A ,
w1 , #15
[w1++] , w2
[w1++] , w3
[w1] , w2
[w1] , w2
•
•
•
•
•
•
EDS PROGRAM ADDRESS WITH DIFFERENT PAGES AND ADDRESSES
EDS READ CODE FROM PROGRAM MEMORY IN ASSEMBLY
w1
Source Address while
Indirect Addressing
8000h to FFFFh
;page 0x202, consisting lower words, is selected for read
;select the location (0x0A) to be read
;set the MSB of the base address, enable EDS mode
;read Low byte
;read High byte
;
;two word read, stored in w2 and w3
23-Bit EA Pointing to
7F8000h to 7FFFFEh
7F8001h to 7FFFFFh
000000h to 007FFEh
000001h to 007FFFh
Invalid Address
Table 4-38
address for program memory with EDS page and
source addresses.
For operations that use PSV and are executed outside
a REPEAT loop, the MOV and MOV.D instructions will
require one instruction cycle in addition to the specified
execution time. All other instructions will require two
instruction cycles in addition to the specified execution
time.
For operations that use PSV, which are executed inside
a REPEAT loop, there will be some instances that
require two instruction cycles in addition to the
specified execution time of the instruction:
• Execution in the first iteration
• Execution in the last iteration
• Execution prior to exiting the loop due to an
• Execution upon re-entering the loop after an
Any other iteration of the REPEAT loop will allow the
instruction accessing data, using PSV, to execute in a
single cycle.
EDS
interrupt
interrupt is serviced
•
•
•
•
•
•
provides the corresponding 23-bit EDS
Address error trap
Lower words of 4M program
instructions; (8 Mbytes) for
read operations only.
Upper words of 4M program
instructions (4 Mbytes remaining;
4 Mbytes are phantom bytes) for
read operations only.
 2010-2011 Microchip Technology Inc.
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