MA240029 Microchip Technology, MA240029 Datasheet - Page 257
![no-image](/images/manufacturer_photos/0/4/439/microchip_technology_sml.jpg)
MA240029
Manufacturer Part Number
MA240029
Description
Daughter Cards & OEM Boards PIC24FJ128GA310 Gen Purpose PIM
Manufacturer
Microchip Technology
Datasheet
1.MA240029.pdf
(406 pages)
Specifications of MA240029
Rohs
yes
Product
Daughter Cards
Core
PIC
Description/function
Plug-in module
Interface Type
I2C, SPI
Tool Is For Evaluation Of
PIC24FJ128GA310
For Use With
Explorer 16 Development Board
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MA240029
Manufacturer:
MICROCHIP
Quantity:
12 000
- Current page: 257 of 406
- Download datasheet (3Mb)
REGISTER 20-3:
2010-2011 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14
bit 13
bit 12
bit 11
bit 10-9
bit bit 8
bit 7
bit 6-0
Note 1:
PTWREN
R/W-0
U-0
—
These bits are not available in 80 and 64-pin devices (PIC24FJXXXGA306, PIC24FJXXXGA308).
PTWREN: Write/Enable Strobe Port Enable bit
1 = PMWR/PMENB port is enabled
0 = PMWR/PMENB port is disabled
PTRDEN: Read/Write Strobe Port Enable bit
1 = PMRD/PMWR port is enabled
0 = PMRD/PMWR port is disabled
PTBE1EN: High Nibble/Byte Enable Port Enable bit
1 = PMBE1 port is enabled
0 = PMBE1 port is disabled
PTBE0EN: Low Nibble/Byte Enable Port Enable bit
1 = PMBE0 port is enabled
0 = PMBE0 port is disabled
Unimplemented: Read as ‘0’
AWAITM<1:0>: Address Latch Strobe Wait States bits
11 = Wait of 3½ T
10 = Wait of 2½ T
01 = Wait of 1½ T
00 = Wait of ½ T
AWAITE: Address Hold After Address Latch Strobe Wait States bits
1 = Wait of 1¼ T
0 = Wait of ¼ T
Unimplemented: Read as ‘0’
PTEN<22:16>: EPMP Address Port Enable bits
1 = PMA<22:16> function as EPMP address lines
0 = PMA<22:16> function as port I/Os
PTEN22
PTRDEN
R/W-0
R/W-0
PMCON3: EPMP CONTROL REGISTER 3
(1)
W = Writable bit
‘1’ = Bit is set
CY
PTEN21
PTBE1EN
CY
CY
CY
CY
CY
R/W-0
R/W-0
(1)
PTEN20
PTBE0EN
PIC24FJ128GA310 FAMILY
R/W-0
R/W-0
(1)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PTEN19
R/W-0
(1)
U-0
—
(1)
PTEN18
AWAITM1
R/W-0
R/W-0
(1)
x = Bit is unknown
PTEN17
AWAITM0
R/W-0
R/W-0
(1)
DS39996F-page 257
PTEN16
AWAITE
R/W-0
R/W-0
bit 8
bit 0
(1)
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