ADP1046DC1-EVALZ Analog Devices, ADP1046DC1-EVALZ Datasheet - Page 74

• Manufacturer Part Number: ADP1046DC1-EVALZ
• Description: Daughter Cards & OEM Boards ADP1046 Daughter Card
• Manufacturer: Analog Devices
• Series: ADP1046r

Specifications of ADP1046DC1-EVALZ

• Rohs: yes
• Product: Daughter Cards
• Description/function: 100 kHz daughter board
• Interface Type: I2C
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Operating Supply Voltage: 3.3 V
• Factory Pack Quantity: 1
• For Use With: ADP1046

Table 90. Register 0x5A—OUTAUX Rising Edge Setting (OUTAUX Pin)
Bits
[7:4]
3
2
[1:0]
Table 91. Register 0x5B—OUTAUX Falling Edge Timing (OUTAUX Pin)
Bits
[7:0]
Table 92. Register 0x5C—OUTAUX Falling Edge Setting (OUTAUX Pin)
Bits
[7:4]
3
2
1
0
ADP1046
Bit Name
t
Modulate enable
t
Reserved
Bit Name
t
Bit Name
t
Modulate enable
t
Regulate with
OUTAUX
Reserved
13
13
14
14
14
sign
sign
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
These bits contain the four LSBs of the 12-bit t
bits of Register 0x59, which contains the eight MSBs of the t
resolution. The entire switching period is divided into 40 ns time steps. If the t_rise and t_fall of a
PWM edge occur within the same 40 ns time step, the PWM output is 0 V. If the t_rise and t_fall
occur in different 40 ns time steps, the PWM output is set to the programmed value. The absolute
maximum pulse width is t
frequency, there is a constant lag/lead time between this edge and the other edges (t
fore, OUTAUX is not synchronized to the other PWM outputs but can be made synchronous by
adjusting the delay accordingly. If either the OUTAUX switching frequency (Register 0x3F) or the
PWM switching frequency (Register 0x40) is changed after edge adjustment, the synchronization
between OUTAUX and the PWM edges is no longer maintained. The OUTAUX delay must be
adjusted again to synchronize the edges to the PWM edges for the new set of switching frequencies.
1 = PWM modulation acts on the t
0 = no PWM modulation of the t
1 = negative sign. Increase of PWM modulation moves t
0 = positive sign. Increase of PWM modulation moves t
Reserved.
Description
This register contains the eight MSBs of the 12-bit t
four bits of Register 0x5C, which contains the four LSBs of the t
5 ns resolution. The entire switching period is divided into 40 ns time steps. If the t_rise and t_fall of
a PWM edge occur within the same 40 ns time step, the PWM output is 0 V. If the t_rise and t_fall
occur in different 40 ns time steps, the PWM output is set to the programmed value. The absolute
maximum pulse width is t
frequency, there is a constant lag/lead time between this edge and the other edges (t
fore, OUTAUX is not synchronized to the other PWM outputs but can be made synchronous by
adjusting the delay accordingly. If either the OUTAUX switching frequency (Register 0x3F) or the
PWM switching frequency (Register 0x40) is changed after edge adjustment, the synchronization
between OUTAUX and the PWM edges is no longer maintained. The OUTAUX delay must be
adjusted again to synchronize the edges to the PWM edges for the new set of switching frequencies.
Description
These bits contain the four LSBs of the 12-bit t
bits of Register 0x5B, which contains the eight MSBs of the t
resolution. The entire switching period is divided into 40 ns time steps. If the t_rise and t_fall of a
PWM edge occur within the same 40 ns time step, the PWM output is 0 V. If the t_rise and t_fall
occur in different 40 ns time steps, the PWM output is set to the programmed value. The absolute
maximum pulse width is t
frequency, there is a constant lag/lead time between this edge and the other edges (t
fore, OUTAUX is not synchronized to the other PWM outputs but can be made synchronous by
adjusting the delay accordingly. If either the OUTAUX switching frequency (Register 0x3F) or the
PWM switching frequency (Register 0x40) is changed after edge adjustment, the synchronization
between OUTAUX and the PWM edges is no longer maintained. The OUTAUX delay must be
adjusted again to synchronize the edges to the PWM edges for the new set of switching frequencies.
1 = PWM modulation acts on the t
0 = no PWM modulation of the t
1 = negative sign. Increase of PWM modulation moves t
0 = positive sign. Increase of PWM modulation moves t
1 = control loop PWM modulation is regulated by OUTAUX. When this bit is set, the CS1 blanking
signal is synchronized with OUTAUX.
0 = control loop PWM modulation is regulated by OUTA, OUTB, OUTC, OUTD, SR1, and SR2
(normal mode).
Reserved. Set this bit to 0 for normal operation.
Rev. B | Page 74 of 92
PERIOD
PERIOD
PERIOD
− 5 ns. Depending on the switching frequency and the OUTAUX
− 5 ns. Depending on the switching frequency and the OUTAUX
− 5 ns. Depending on the switching frequency and the OUTAUX
13
14
13
14
edge.
edge.
edge.
edge.
13
14
time. This value is always used with the eight
time. This value is always used with the eight
14
time. This value is always used with the top
13
14
13
14
left.
left.
right.
right.
13
14
time. Each LSB corresponds to 5 ns
time. Each LSB corresponds to 5 ns
14
time. Each LSB corresponds to
Data Sheet
1
1
1
to t
to t
to t
12
12
12
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