UPMU-M3L1xLCD-B-EK Silicon Labs, UPMU-M3L1xLCD-B-EK Datasheet - Page 15
UPMU-M3L1xLCD-B-EK
Manufacturer Part Number
UPMU-M3L1xLCD-B-EK
Description
Daughter Cards & OEM Boards UDP SiM3L1xx MCU Card (with LCD)
Manufacturer
Silicon Labs
Datasheet
1.UPMU-M3L1X-B-EK.pdf
(95 pages)
Specifications of UPMU-M3L1xLCD-B-EK
Product
MCU Cards
Core
ARM Cortex M3
Data Bus Width
32 bit
Description/function
MCU Card (with Static LCD) to use with UDP Motherboard
Interface Type
I2C, SPI, UART
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Tool Is For Evaluation Of
SiM3L1xx
For Use With
SiM3L1xx
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Table 3.5. On-Chip Regulators
DC-DC Buck Converter
Input Voltage Range
Input Supply to Output Voltage Differ-
ential (for regulation)
Output Voltage Range
Output Voltage Accuracy
Output Current
Inductor Value
Inductor Current Rating
Output Capacitor Value
Input Capacitor Value
Load Regulation
Maximum DC Load Current During
Startup
Switching Clock Frequency
Local Oscillator Frequency
LDO Regulators
Input Voltage Range
Output Voltage Range
LDO Output Voltage Accuracy
Output Settings in PM8 (All LDOs)
Notes:
1. See reference manual for recommended inductors.
2. Recommended: X7R or X5R ceramic capacitors with low ESR. Example: Murata GRM21BR71C225K with ESR < 10
3. Input voltage specification accounts for the internal LDO dropout voltage under the maximum load condition to ensure
4. The memory LDO output should always be set equal to or lower than the output of the analog LDO. When lowering both
5. Output range represents the programmable output range, and does not reflect the minimum voltage under all
6. Analog peripheral specifications assume a 1.8 V output on the analog LDO.
m (@ frequency > 1 MHz).
that the LDO output voltage will remain at a valid level as long as
LDOs (for example to go into PM8 under low supply conditions), first adjust the memory LDO and then the analog LDO.
When raising the output of both LDOs, adjust the analog LDO before adjusting the memory LDO.
conditions.
Parameter
1
3
2
4
V
Symbol
V
C
V
V
F
F
I
I
V
C
LDOACC
V
DCOUT
DCMAX
DCOSC
V
V
DCREG
DCOUT
DCACC
R
DCOUT
DCCLK
I
LDOIN
L
DCIN
LDC
DCIN
LDO
LDO
load
DC
1.95 V < V
1.8 V < V
2.0 V < V
Sourced from VBAT
Rev 0.5
Sourced from VDC
Test Condition
I
I
load
load
< 50 mA
> 50 mA
BAT
BAT
BAT
V
< 2.9 V
< 3.8 V
< 3.5 V
LDOIN
is at or above the specified minimum.
0.45
1.25
0.47
Min
450
550
1.8
1.9
2.4
1.8
1.9
0.8
—
—
—
—
—
—
1
0.56
0.03
Typ
±25
±25
2.2
4.7
2.9
2.9
1.5
1.8
1.9
—
—
—
—
—
—
—
—
—
—
SiM3L1xx
Max
0.68
3.8
3.8
3.8
3.4
3.8
3.8
1.9
90
10
—
—
—
—
—
—
—
5
mV/mA
MHz
MHz
Unit
mV
mA
mA
mA
mA
mV
µH
µF
µF
V
V
V
V
V
V
V
V
V
15
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