EVAL-AD5110SDZ Analog Devices, EVAL-AD5110SDZ Datasheet - Page 26

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EVAL-AD5110SDZ

Manufacturer Part Number
EVAL-AD5110SDZ
Description
Digital Potentiometer Development Tools Evaluation board
Manufacturer
Analog Devices
Series
AD5110r
Datasheet

Specifications of EVAL-AD5110SDZ

Rohs
yes
Product
Evaluation Boards
Tool Is For Evaluation Of
AD5110
Resistance
10 kOhms
Operating Supply Voltage
5.5 V
Interface Type
I2C
Maximum Operating Temperature
+ 125 C
Factory Pack Quantity
1
AD5110/AD5112/AD5114
TERMINAL VOLTAGE OPERATING RANGE
The
ESD diodes for protection. These diodes also set the voltage
boundary of the terminal operating voltages. Positive signals
present on Terminal A, Terminal B, or Terminal W that
exceed V
is no polarity constraint between V
cannot be higher than V
POWER-UP SEQUENCE
Because there are diodes to limit the voltage compliance at
Terminal A, Terminal B, and Terminal W (Figure 49), it is
important to power V
to Terminal A, Terminal B, and Terminal W. Otherwise,
the diode is forward-biased such that V
unintentionally. The ideal power-up sequence is GND,
V
DD
, V
AD5110/AD5112/AD5114
LOGIC
Figure 49. Maximum Terminal Voltages Set by V
DD
, digital inputs, and V
are clamped by the forward-biased diode. There
DD
DD
first before applying any voltage
or lower than GND.
are designed with internal
A
, V
A
, V
B
, and V
W
DD
, and V
is powered
GND
V
A
W
B
DD
W
. The order
DD
B
, but they
and GND
Rev. B | Page 26 of 28
of powering V
long as they are powered after V
power-up sequence and the ramp rates of the power supplies,
once V
restores EEPROM values to the RDAC registers.
LAYOUT AND POWER SUPPLY BIASING
It is always a good practice to use compact, minimum lead
length layout design. The leads to the input should be as direct
as possible with a minimum conductor length. Ground paths
should have low resistance and low inductance. It is also good
practice to bypass the power supplies with quality capacitors.
Low equivalent series resistance (ESR) 1 μF to 10 μF tantalum
or electrolytic capacitors should be applied at the supplies to
minimize any transient disturbance and to filter low frequency
ripple. Figure 50 illustrates the basic supply bypassing
configuration for the AD5110/AD5112/AD5114.
V
DD
+
LOGIC
C2
10µF
is powered, the power-on preset activates, which
A
, V
C1
0.1µF
Figure 50. Power Supply Bypassing
B
, V
W
, and digital inputs is not important as
V
AD5110/
AD5112/
DD
AD5114
GND
V
LOGIC
DD
and V
C3
0.1µF
LOGIC
. Regardless of the
Data Sheet
C4
10µF
+
V
LOGIC

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