AT25DF021-MH-T Atmel, AT25DF021-MH-T Datasheet - Page 24

IC FLASH 2MBIT 70MHZ 8UDFN

AT25DF021-MH-T

Manufacturer Part Number
AT25DF021-MH-T
Description
IC FLASH 2MBIT 70MHZ 8UDFN
Manufacturer
Atmel
Datasheet

Specifications of AT25DF021-MH-T

Format - Memory
FLASH
Memory Type
DataFLASH
Memory Size
2M (256K x 8)
Speed
70MHz
Interface
SPI, 3-Wire Serial
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-UDFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
11.1.5
11.1.6
Figure 11-1. Read Status Register
24
AT25DF021
WEL Bit
RDY/BSY Bit
SCK
SO
CS
SI
HIGH-IMPEDANCE
MSB
0
0
The WEL bit indicates the current status of the internal Write Enable Latch. When the WEL bit is
in the logical “0” state, the device will not accept any Byte/Page Program, erase, Protect Sector,
Unprotect Sector, Program OTP Security Register, or Write Status Register commands. The
WEL bit defaults to the logical “0” state after a device power-up or reset operation. In addition,
the WEL bit will be reset to the logical “0” state automatically under the following conditions:
If the WEL bit is in the logical “1” state, it will not be reset to a logical “0” if an operation aborts
due to an incomplete or unrecognized opcode being clocked into the device before the CS pin is
deasserted. In order for the WEL bit to be reset when an operation aborts prematurely, the entire
opcode for a Byte/Page Program, erase, Protect Sector, Unprotect Sector, Program OTP Secu-
rity Register, or Write Status Register command must have been clocked into the device.
The RDY/BSY bit is used to determine whether or not an internal operation, such as a program
or erase, is in progress. To poll the RDY/BSY bit to detect the completion of a program or erase
cycle, new Status Register data must be continually clocked out of the device until the state of
the RDY/BSY bit changes from a logical “1” to a logical “0”.
0
• Write Disable operation completes successfully
• Write Status Register operation completes successfully or aborts
• Protect Sector operation completes successfully or aborts
• Unprotect Sector operation completes successfully or aborts
• Program OTP Security Register operation completes successfully or aborts
• Byte/Page Program operation completes successfully or aborts
• Block Erase operation completes successfully or aborts
• Chip Erase operation completes successfully or aborts
• Hold condition aborts
1
0
2
OPCODE
0
3
0
4
1
5
0
6
1
7
MSB
D
8
D
9
ST
D
10 11
ATUS REGISTER
DATA
D
D
12
D
13 14
D
D
15 16
MSB
D
D
17
ST
D
ATUS REGISTER
18
DATA
D
19
D
20
D
21 22
D
D
23 24
MSB
D
D
25
ST
D
ATUS REGISTER
26
DATA
D
27
D
28 29
D
D
30
D
3677D–DFLASH–04/09

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