AT88SC153-10SU-00 Atmel, AT88SC153-10SU-00 Datasheet - Page 15

IC EEPROM 2KBIT 1MHZ 8SOIC

AT88SC153-10SU-00

Manufacturer Part Number
AT88SC153-10SU-00
Description
IC EEPROM 2KBIT 1MHZ 8SOIC
Manufacturer
Atmel
Series
CryptoMemory®r
Datasheet

Specifications of AT88SC153-10SU-00

Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Memory Size
2K (256 x 8)
Speed
1MHz
Interface
Serial
Voltage - Supply
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT88SC153-10SU-00
Manufacturer:
ATMEL
Quantity:
310
Part Number:
AT88SC153-10SU-00
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
10. Device Operation
10.1
10.2
10.3
10.4
10.5
10.6
10.7
1016E–SMEM–12/07
Clock and Data Transitions
Start Condition
Stop Condition
Acknowledge
Standby Mode
Acknowledge Polling
Device Timing
The SDA pin is normally pulled high with an external device. Data on the SDA pin may change
only during SCL-low time periods
periods will indicate a start or stop condition as defined below.
A high-to-low transition of SDA with SCL high is a start condition that must precede any other
command
A low-to-high transition of SDA with SCL high is a stop condition. After a read sequence, the
stop command will place the device in a standby power mode
All addresses and data are serially transmitted to and from the device in 8-bit words. The device
sends a “0” to acknowledge that it has received each byte. This happens during the ninth clock
cycle.
The AT88SC153 features a low-power standby mode that is enabled upon power-up and after
the receipt of the stop bit and the completion of any internal operations.
Once the internally-timed write cycle has started and the device inputs are disabled, acknowl-
edge polling can be initiated. This involves sending a start condition followed by the command
byte representative of the operation desired. Only if the internal write cycle has completed will
the device respond with a “0”, allowing the sequence to continue.
Figure 10-1. Start and Stop Definition
(Figure 10-1 on page
15).
(Figure 10-2 on page
16). Data changes during SCL-high time
(Figure 10-1 on page
15).
15

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