AT88SC153-10SU-00 Atmel, AT88SC153-10SU-00 Datasheet

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... Table 0-1. Pin Configuration Name Description VCC Supply Voltage GND Ground SCL Serial Clock Input SDA Serial Data Input/Output RST Reset Input Figure 0-1. Card Module Contact VCC RST ISO Module Contact Standard Package Pin Secure Memory with Authentication AT88SC153 1016E-SMEM-12/07 ...

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... SOIC or, PDIP 1. Description The AT88SC153 provides 2,048 bits of serial EEPROM memory organized as one configuration zone of 64 bytes and three user zones of 64 bytes each. This device is optimized as a “secure memory” for multiapplication smart card markets, secure identification for electronic data trans- fer, or components in a system without the requirement of an internal microprocessor ...

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Figure 2-1. 3. Pin Descriptions 3.1 Supply Voltage (VCC) The VCC input is a 2.7V-to-5.5V positive voltage supplied by the host. 3.2 Serial Clock (SCL) The SCL input is used to positive edge clock data into the device and negative ...

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... Address $20 also serves as the virtual address of the Checksum Authentication Register (CAR) during checksum mode. Note: CMC: Card Manufacturer Code AR0–2: Access Register for User Zone MTZ: Memory Test Zone DCR: Device Configuration Register AAC: Authentication Attempts Counter PAC: Password Attempts Counter AT88SC153 bytes 64 bytes ...

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... FAB, CMA, and PER are nonvolatile fuses blown at the end of each card life step. Once blown, these EEPROM fuses can not be reset. • The FAB fuse is blown by Atmel prior to shipping wafers to the card manufacturer. • The CMA fuse is blown by the card manufacturer prior to shipping cards to the issuer. ...

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... Each access register may point to a unique password set, or access registers for multiple zones may point to the same password set. In this case, verification of a single password will open several zones, combining the zones into a single larger zone. AT88SC153 6 Access Registers ...

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... The write password allows modification of the read and write passwords of the same set. By default, Password 1 is selected for all user zones. Secure Code: The secure code is a 24-bit password defined by Atmel and is different for each card manufacturer. The Write 1 Password is used as the secure code until the personalization is over (PER = 0) ...

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... Programmable Chip Select (CS0–CS3): The four most significant bits (b4–b7) of every com- mand comprise the chip select address. All AT88SC153 devices will respond to the default chip select address of $B (1011). Each device will also respond to a second chip select address pro- grammed into CS0– ...

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... The current password is memorized and active until power is turned off, unless a new password is presented or RST becomes active. Only one password is active at a time. The AT88SC153 requires that the Verify Password command be transmitted twice in sequence to successfully verify a write or read password ...

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... Write EEPROM CS3 Read EEPROM CS3 Verify Password CS3 Initialize Authentication CS3 Verify Authentication CS3 Write Fuse CS3 Read Fuse CS3 Note Read/write password p : Password set AT88SC153 10 Command Chip Select CS2 CS1 CS0 CS2 CS1 CS0 CS2 CS1 CS0 CS2 CS1 ...

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Read EEPROM Figure 9-1. Note: The data byte address is internally incremented following the transmission of each data byte. During a read operation, the address “roll over” is from the last byte of the current zone to the first ...

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... Read Fuses Figure 9-3. Note: The Read Fuses operation is always allowed. The AT88SC153 will continuously transmit the fuse byte if the host continues to transmit an ACK. The command is terminated when the host transmits a NACK and STOP bit. 9.4 Write Fuses Figure 9-4. ...

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... PAC corresponding to the “r” and “p” bits. The data bits in this initial- ization command are ignored. The second Verify Password command will compare the 3-byte password data presented with the corresponding password value stored in memory. If the com- parison is valid, the PAC will be cleared. For both commands, once the command sequence is completed and a stop condition is issued, a nonvolatile write cycle is initiated to update the asso- ciated attempts counter ...

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... ACK polling sequence with the specific command byte of $BD, to read the corre- sponding attempts counter in the configuration zone. A valid authentication will result in the AAC cleared to $FF. An invalid authentication attempt will initiate a nonvolatile write cycle, but no clear operation will be performed on the AAC. AT88SC153 14 Initiatize Authentication Q: Host random number, 8 bytes ...

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... This happens during the ninth clock cycle. 10.5 Standby Mode The AT88SC153 features a low-power standby mode that is enabled upon power-up and after the receipt of the stop bit and the completion of any internal operations. 10.6 Acknowledge Polling Once the internally-timed write cycle has started and the device inputs are disabled, acknowl- edge polling can be initiated ...

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... Note: Figure 10-2. Data Validity SDA SCL Figure 10-3. Output Acknowledge DATA OUT Note: AT88SC153 16 The SCL input should be low when the device is idle. Therefore, SCL is low before a start condi- tion and after a stop condition. DATA STABLE 1 SCL DATA IN START To transmit a NACK (no acknowledge), hold data (SDA) high during the entire ninth clock cycle. ...

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... Input Low Level IL (3) V Input High Level IH V Output Low Level (V OL2 CC Notes: 1. This parameter is preliminary; Atmel may change the specifications upon further characterization. 2. Output not loaded min and V max are reference only and are not tested 1016E–SMEM–12/07 *NOTICE Characteristics = +2 ...

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... Applicable at recommended operating conditions: T Symbol Test Condition C Input/Output Capacitance (SDA) I/O C Input Capacitance (RST, SCL) IN Notes: 1. This parameter is characterized and is not 100% tested. AT88SC153 18 = 0°C to +70° (1) = 25° 1.0 MHz (1) (1) = +2.7V to +5.5V TTL Gate and 100 CC 5.0 Volt ...

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Timing Diagrams Figure 15-1. Bus Timing (SCL: Serial Clock; SDA: Serial Data I/O) Figure 15-2. Synchronous Answer-to-reset Timing Figure 15-3. Write Cycle (SCL: Serial Clock; SDA: Serial Data I/O) SCL SDA Note: 1016E–SMEM–12/07 ACK 8th BIT WORD n CONDITION ...

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... Ordering Information Ordering Code Package AT88SC153-09ET-00 M2 – E Module AT88SC153-09PT-00 M2 – P Module AT88SC153-10PU-00 8P3 AT88SC153-10SU-00 8S1 AT88SC153-10WU-00 7 mil Wafer (1) Package Type M2 – P Module M2 – E Module 8S1 8P3 Notes: 1. Formal drawings may be obtained from an Atmel Sales Office. 17. Smart Card Modules Ordering Code: 09ET-00 Module Size: M2-00 Dimension*: 12 ...

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Ordering Code: 10SU-00 8-lead SOIC 1016E–SMEM–12/07 21 ...

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... D, D1 and E1 dimensions do not include mold Flash or protrusions. Mold Flash or protrusions shall not exceed 0.010 inch and eA measured with the leads constrained to be perpendicular to datum. 5. Pointed or rounded lead tips are preferred to ease insertion and b3 maximum dimensions do not include Dambar protrusions. Dambar protrusions shall not exceed 0.010 (0.25 mm). 2325 Orchard Parkway San Jose, CA 95131 R AT88SC153 ...

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Revision History Lit Number 1016E 1016E–SMEM–12/07 Date Comment Adjusted Absolute Maximum Ratings Adjusted Ordering Codes Removed LAP 12/2007 Fixed spacing on minus signs Updated to new template Modified Ordering Codes Replaced 8-lead SOIC figure with version C 23 ...

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