ZLF645S0Q2032G Maxim Integrated, ZLF645S0Q2032G Datasheet - Page 78

• Manufacturer Part Number: ZLF645S0Q2032G
• Description: 8-bit Microcontrollers - MCU Crimzon Flash Infrared MCU
• Manufacturer: Maxim Integrated

Specifications of ZLF645S0Q2032G

• Core: Z8
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 8 MHz
• Program Memory Size: 32 KB
• Data Ram Size: 1 KB
• On-chip Adc: No
• Operating Supply Voltage: 2 V to 3.6 V
• Package / Case: QFN-EP-20
• Mounting Style: SMD/SMT
• Interface Type: UART
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Number Of Programmable I/os: 5
• Number Of Timers: 2 x 8 bit, 1 x 16 bit
• On-chip Dac: No
• Processor Series: ZLF645
• Program Memory Type: Flash
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 2 V

19-4572; Rev 0; 4/09
Enabling the Flash Controller For Flash Memory Accesses
Upon ZLF645 reset, the Flash Controller is put into a ‘locked’ state where Flash Accesses
through the controller are disabled. Before any Flash memory accesses can take place
through the Flash Controller it must be ‘unlocked’. This functionality is designed to help
protect against accidental programming or erasure of the Flash memory by Flash accesses
initiated by the ICP interface or by the CPU during code execution. To ‘unlock’ the Flash
Controller the ICP or CPU must perform the following sequence of Flash Controller 
Register write operations:
1. Program the Flash Controller’s Page Select (PGS) register with the page to be
2. Program the Flash Controller’s Flash Control Register (FCTL) with a value of
3. Program the Flash Controller’s Flash Control Register (FCTL) with a value of
4. Program the Flash Controller’s Page Select (PGS) register with the same value as
Failure to follow the exact register programming sequence as described above causes the
Flash Controller to revert back to ‘locked’ state and the sequence must be repeated starting
from step 1. For instance, if the two Page Select register writes in steps 1 and 4 do not
match, the controller reverts to ‘locked’ state.
After ‘unlocking’ the Flash Controller, a programming or page erase operation can now be
initiated through the Flash Controller to the page pointed to by the Page Select (PGS) 
register. For example, once the Flash Controller is ‘unlocked’, writing a
Control (FCTL) register initiates a page erase. For a description of how to execute 
programming, see
As mentioned in the
erase operations may be limited by the Flash Controller based upon the values 
programmed in the Flash Controller’s Sector Protect (FSEC) register. For CPU initiated
operations, the operation must be to a non-protected sector for the Flash Controller to exe-
cute the operation. For ICP initiated programming or erase operations, or if the page to be
programmed/erased is in the Flash information Area, the operation is executed indepen-
dent of the Sector Protect (FSEC) register settings.
After unlocking a specific page, the ICP or CPU can program any byte on that page or
erase that page. For programming, after a byte is written the page remains unlocked,
allowing for subsequent writes to other bytes on the same page. Once ‘unlocked’, the
Flash Controller will revert to ‘locked’ state under the following conditions:
1. The Flash Controller has completed any programming operations in progress and the
2. The Flash Controller has successfully completed a page erase or mass erase operation.
programmed or erased.
programmed in step 1 above.
ICP or CPU writes the Flash Control (FCTL) register with a value other than
63H
.
Byte Programming
Flash Memory Overview
on page 74.
on page 67, CPU initiated programming or
ZLF645 Series Flash MCUs
Product Specification
Flash Controller Overview
95H
to the Flash
95H
73H
8CH
or
.
.
70