ZLF645E0Q2032G Maxim Integrated, ZLF645E0Q2032G Datasheet - Page 74

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ZLF645E0Q2032G

Manufacturer Part Number
ZLF645E0Q2032G
Description
8-bit Microcontrollers - MCU Crimzon Flash Infrared MCU
Manufacturer
Maxim Integrated
Datasheet

Specifications of ZLF645E0Q2032G

Core
Z8
Data Bus Width
8 bit
Maximum Clock Frequency
8 MHz
Program Memory Size
32 KB
Data Ram Size
1 KB
On-chip Adc
No
Operating Supply Voltage
2 V to 3.6 V
Package / Case
QFN-EP-20
Mounting Style
SMD/SMT
Interface Type
UART
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Number Of Programmable I/os
5
Number Of Timers
2 x 8 bit, 1 x 16 bit
On-chip Dac
No
Processor Series
ZLF645
Program Memory Type
Flash
Supply Voltage - Max
3.6 V
Supply Voltage - Min
2 V
Table 31. TEST Mode Register (TESTMODE)
Exiting ICP Mode
19-4572; Rev 0; 4/09
Bit Position
[7:3]
[2]
[1:0]
Bits
Field
Reset
R/W
TEST Mode Register
R/W
7
0
The TEST Mode register is used to enable various device test or Flash memory access
modes. At present this register only provides configuration for a single mode where, once
programmed, Flash memory accesses bypass the devices Flash Controller and are done
through the devices I/O pins. A complete description of this mode is available in the Flash
Byte Programming Interface section. This register can only be read or written using the
ICP Read/Write Test Mode Register commands.
The ZLF645 MCU is taken out of ICP mode under any of the following conditions:
Value
Initiating a POR with P36 held High during the entire reset period.
Lowering V
1
0
R
6
0
Description
Reserved — Must be written to 1. Reads return 0.
Flash Controller Bypass Mode
The device is not in Flash Controller Bypass Mode.
The device is in Flash Controller Bypass mode.
Reserved —Must be written to 1. Reads return 0.
DD
Reserved F
until the ZLF645 MCU reaches a Voltage Brownout reset state.
R
5
0
R
4
0
R
3
0
Bypass Mode
lash Controller
R/W
2
0
ZLF645 Series Flash MCUs
Product Specification
R
1
0
Reserved
Exiting ICP Mode
R
0
0
66

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