SST89E554RC-40-C-PI Microchip Technology, SST89E554RC-40-C-PI Datasheet - Page 32
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SST89E554RC-40-C-PI
Manufacturer Part Number
SST89E554RC-40-C-PI
Description
8-bit Microcontrollers - MCU 32KB+8KB 40ns
Manufacturer
Microchip Technology
Datasheet
1.SST89E564RD-40-I-NJE.pdf
(90 pages)
Specifications of SST89E554RC-40-C-PI
Core
8051
Data Bus Width
8 bit
Maximum Clock Frequency
40 MHz
Program Memory Size
32 KB
Data Ram Size
1 KB
On-chip Adc
No
Operating Supply Voltage
4.5 V to 5.5 V
Package / Case
PDIP-40
Mounting Style
Through Hole
Data Rom Size
128 B
Interface Type
SPI, UART
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Number Of Programmable I/os
32
Number Of Timers
16 bit
On-chip Dac
No
Processor Series
FlashFlex
Program Memory Type
Flash
Supply Voltage - Max
5.5 V
Supply Voltage - Min
4.5 V
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
SST89E554RC-40-C-PI
Manufacturer:
FREESCALE
Quantity:
12
EOL Data Sheet
Serial Port Control Register (SCON)
©2007 Silicon Storage Technology, Inc.
Location
98H
Symbol
FE
SM0
SM1
SM2
REN
TB8
RB8
TI
RI
SM0/FE
7
SM1
6
Function
Set SMOD0 = 1 to access FE bit.
0: No framing error
1: Framing Error. Set by receiver when an invalid stop bit is detected. This bit needs to
be cleared by software.
SMOD0 = 0 to access SM0 bit.
Serial Port Mode Bit 0
Serial Port Mode Bit 1
Enables the Automatic Address Recognition feature in Modes 2 or 3. If SM2 = 1 then RI
will not be set unless the received 9th data bit (RB8) is 1, indicating an address, and
the received byte is a given or broadcast address. In Mode 1, if SM2 = 1 then RI will not
be activated unless a valid stop bit was received. In Mode 0, SM2 should be 0.
Enables serial reception.
0: to disable reception.
1: to enable reception.
The 9th data bit that will be transmitted in Modes 2 and 3. Set or clear by software as
desired.
In Modes 2 and 3, the 9th data bit that was received. In Mode 1, if SM2 = 0, RB8 is the
stop bit that was received. In Mode 0, RB8 is not used.
Transmit interrupt flag. Set by hardware at the end of the 8th bit time in Mode 0, or at
the beginning of the stop bit in the other modes, in any serial transmission, Must be
cleared by software.
Receive interrupt flag. Set by hardware at the end of the8th bit time in Mode 0, or
halfway through the stop bit time in the other modes, in any serial reception (except see
SM2). Must be cleared by software.
1. f
SM0
0
0
1
1
OSC
= oscillator frequency
SM2
5
SM1
0
1
0
1
REN
4
32
Mode
TB8
0
1
2
3
3
Description
Shift Register
8-bit UART
9-bit UART
9-bit UART
RB8
SST89E564RD / SST89V564RD
SST89E554RC / SST89V554RC
2
Baud Rate
f
f
Variable
f
or
f
Variable
OSC
OSC
OSC
OSC
TI
1
/6 (6 clock mode) or
/12 (12 clock mode)
/32 or f
/64 or f
1
OSC
OSC
FlashFlex MCU
RI
0
/16 (6 clock mode)
/32 (12 clock mode)
S71207-08-EOL
Reset Value
00000000b
1/07