VRS51C1100-40-L-ISPV2 Cypress Semiconductor, VRS51C1100-40-L-ISPV2 Datasheet - Page 16

• Manufacturer Part Number: VRS51C1100-40-L-ISPV2
• Description: 8-bit Microcontrollers - MCU 128K+1K 40MHz 5V
• Manufacturer: Cypress Semiconductor

Specifications of VRS51C1100-40-L-ISPV2

• Product Category: 8-bit Microcontrollers - MCU
• Core: 8051
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 40 MHz
• Program Memory Size: 64 KB
• Data Ram Size: 1 KB
• Operating Supply Voltage: 4.5 V to 5.5 V
• Package / Case: PLCC-44
• Mounting Style: SMD/SMT
• Data Rom Size: 128 B
• Interface Type: UART
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 36
• Number Of Timers: 3
• Program Memory Type: Flash
• Factory Pack Quantity: 26
• Supply Voltage - Max: 5.5 V
• Supply Voltage - Min: 4.5 V

Auxiliary Port 1 Functions
The Port 1 I/O pins are shared with the PWM outputs,
Timer 2 EXT and T2 inputs, as shown below:
Port 3
The Port 3 structure is similar that of Port 1.
T
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ABLE
Bit
7
6
5
4
3
2
1
0
Pin
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
P3.7
VRS51C1100
7
20: P
Mnemonic
T2
T2EX
PWM0
PWM1
PWM2
PWM3
PWM4
ORT
Mnemonic
P3.7
P3.6
P3.5
P3.4
P3.3
P3.2
P3.1
P3.0
P3.6
6
3 R
EGISTER
P3.5
5
(P3) - SFR B0
Description
For each bit of the P3 register correspond
to an I/O line:
0: Output transistor pull the line to 0V
1: The output transistor is blocked so the
pull-up brings the I/O to 5V.
To configure P3 pins as input or use
alternate P3 function the corresponding bit
must be set to 1.
Function
Timer 2 counter input
Timer 2 Auxiliary input
PWM0 output
PWM1 output
PWM2 output
PWM3 output
PWM4 output
P3.4
4
H
P3.3
3
P3.2
2
P3.1
1
P3.0
0
Auxiliary P3 Port Functions
The Port 3 I/O pins are shared with the UART
interface, INT0 and INT1 interrupts, Timer 0 and Timer
1 inputs and the #WR and #RD lines when external
memory accesses are performed.
The following table describes the auxiliary functions of
the Port 3 I/O pins.
T
F
Internal Bus
IGURE
ABLE
Pin
P3.0
P3.1
P3.2
P3.3
P3.4
P3.5
P3.6
P3.7
Write to
Register
Read Register
21: P3 A
10: P3 P
Read Pin
Mnemonic
RXD
TXD
INT0
INT1
T0
T1
WR
RD
UXILIARY
ORT
S
TRUCTURE
F
UNCTION
D Flip-Flop
Function: Input
T
Function
Serial Port:
Receive data in asynchronous mode.
Input and output data in synchronous
mode.
Serial Port:
Transmit data in asynchronous mode.
Output clock value in synchronous mode.
External Interrupt 0
Timer 0 Control Input
External Interrupt 1
Timer 1 Control Input
Timer 0 Counter Input
Timer 1 Counter Input
Write signal for external memory
Read signal for external memory
Auxiliary
Q
Q
ABLE
Function: Output
Auxiliary
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X1
IC Pin