CY7C036A-15AC Cypress Semiconductor Corp, CY7C036A-15AC Datasheet - Page 8

IC SRAM 288KBIT 15NS 100LQFP

CY7C036A-15AC

Manufacturer Part Number
CY7C036A-15AC
Description
IC SRAM 288KBIT 15NS 100LQFP
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY7C036A-15AC

Format - Memory
RAM
Memory Type
SRAM - Dual Port, Asynchronous
Memory Size
288K (16K x 18)
Speed
15ns
Interface
Parallel
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Package / Case
100-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
428-1166

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY7C036A-15AC
Manufacturer:
CY
Quantity:
47
Part Number:
CY7C036A-15AC
Manufacturer:
Cypress Semiconductor Corp
Quantity:
10 000
Switching Characteristics
Data Retention Mode
The CY7C026A and CY7C036A are designed with battery
backup in mind. Data retention voltage and supply current are
guaranteed over temperature. The following rules ensure data
retention:
Notes:
Document #: 38-06046 Rev. *A
17. Test conditions used are Load 2.
18. t
19. CE = V
1. Chip Enable (CE) must be held HIGH during data retention, with-
2. CE must be kept between V
3. The RAM can begin operation >t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
BLA
BHA
BLC
BHC
PS
WB
WH
BDD
INS
INR
SOP
SWRD
SPS
SAA
BUSY TIMING
INTERRUPT TIMING
SEMAPHORE TIMING
in V
during the power-up and power-down transitions.
minimum operating voltage (4.5 volts).
Parameter
BDD
[18]
CC
is a calculated parameter and is the greater of t
to V
CC
, V
CC
in
= GND to V
– 0.2V.
[17]
BUSY LOW from Address Match
BUSY HIGH from Address Mismatch
BUSY LOW from CE LOW
BUSY HIGH from CE HIGH
Port Set-Up for Priority
R/W HIGH after BUSY (Slave)
R/W HIGH after BUSY HIGH (Slave)
BUSY HIGH to Data Valid
INT Set Time
INT Reset Time
SEM Flag Update Pulse (OE or SEM)
SEM Flag Write to Read Time
SEM Flag Contention Window
SEM Address Access Time
[17]
CC
, T
A
= 25 C. This parameter is guaranteed but not tested.
CC
Description
– 0.2V and 70% of V
Over the Operating Range
RC
after V
CC
WDD
reaches the
–t
PWE
(actual) or t
CC
[10]
(continued)
DDD
Min.
10
11
5
0
5
5
–t
Timing
V
CE
ICC
SD
CC
-12
(actual).
Parameter
DR1
[1]
Max.
12
12
12
12
12
12
12
12
Min.
13
10
CY7C026A
CY7C036A
5
0
5
5
4.5V
@ VCC
Data Retention Mode
Test Conditions
V
-15
CC
V
Max.
to V
CC
15
15
15
15
15
15
15
15
DR
CC
2.0V
= 2V
– 0.2V
Min.
15
10
5
0
5
5
[19]
4.5V
-20
CY7C026A
CY7C036A
Max.
20
20
20
17
20
20
20
20
Max.
1.5
V
Page 8 of 18
t
IH
RC
Unit
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
mA

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