M45PE20-VMN6P NUMONYX, M45PE20-VMN6P Datasheet - Page 15

no-image

M45PE20-VMN6P

Manufacturer Part Number
M45PE20-VMN6P
Description
IC FLASH 2MBIT 75MHZ 8SOIC
Manufacturer
NUMONYX
Series
Forté™r
Datasheets

Specifications of M45PE20-VMN6P

Format - Memory
FLASH
Memory Type
FLASH
Memory Size
2M (256K x 8)
Speed
75MHz
Interface
SPI, 3-Wire Serial
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (3.9mm Width)
Clock Frequency
75MHz
Supply Voltage Range
2.7V To 3.6V
Memory Case Style
SO
No. Of Pins
8
Base Number
45
Frequency
75MHz
Ic Generic Number
45PE20
Memory Configuration
256K X 8
Interface Type
Serial, SPI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M45PE20-VMN6P
Manufacturer:
MIT
Quantity:
6 254
Part Number:
M45PE20-VMN6P
Manufacturer:
ST
Quantity:
8 000
Part Number:
M45PE20-VMN6P
Manufacturer:
ST
0
Company:
Part Number:
M45PE20-VMN6P
Quantity:
118
Read Data Bytes at Higher Speed
(FAST_READ)
The device is first selected by driving Chip Select
(S) Low. The instruction code for the Read Data
Bytes at Higher Speed (FAST_READ) instruction
is followed by a 3-byte address (A23-A0) and a
dummy byte, each bit being latched-in during the
rising edge of Serial Clock (C). Then the memory
contents, at that address, is shifted out on Serial
Data Output (Q), each bit being shifted out, at a
maximum frequency f
Serial Clock (C).
The instruction sequence is shown in
The first byte addressed can be at any location.
The address is automatically incremented to the
Figure 12. Read Data Bytes at Higher Speed (FAST_READ) Instruction Sequence and Data-Out
Sequence
Note: Address bits A23 to A18 are Don’t Care.
S
C
D
Q
S
C
D
Q
0
7
32 33 34
1
High Impedance
C
6
2
, during the falling edge of
Instruction
Dummy Byte
5
3
4
4
35
3
36 37 38 39 40 41 42 43 44 45 46
5
2
6
1
7
Figure
23
0
8
MSB
22 21
7
9 10
24 BIT ADDRESS
12..
6
DATA OUT 1
5
3
28 29 30 31
4
2
3
next higher address after each byte of data is shift-
ed out. The whole memory can, therefore, be read
with a single Read Data Bytes at Higher Speed
(FAST_READ) instruction. When the highest ad-
dress is reached, the address counter rolls over to
000000h, allowing the read sequence to be contin-
ued indefinitely.
The
(FAST_READ) instruction is terminated by driving
Chip Select (S) High. Chip Select (S) can be driv-
en High at any time during data output. Any Read
Data Bytes at Higher Speed (FAST_READ) in-
struction, while an Erase, Program or Write cycle
is in progress, is rejected without having any ef-
fects on the cycle that is in progress.
1
2
0
1
Read
0
47
MSB
7
Data
6
DATA OUT 2
5
4
Bytes
3
2
1
at
0
MSB
Higher
7
M45PE20
AI04006
Speed
15/34

Related parts for M45PE20-VMN6P