ST72C334J2B6 STMicroelectronics, ST72C334J2B6 Datasheet - Page 144

• Manufacturer Part Number: ST72C334J2B6
• Description: 8-bit Microcontrollers - MCU Flash 8K SPI/SCI
• Manufacturer: STMicroelectronics

Specifications of ST72C334J2B6

• Product Category: 8-bit Microcontrollers - MCU
• Core: ST7
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 8 MHz
• Program Memory Size: 8 KB
• Data Ram Size: 384 B
• On-chip Adc: Yes
• Operating Supply Voltage: 3.2 V to 5.5 V
• Package / Case: SDIP-42
• Mounting Style: Through Hole
• A/d Bit Size: 8 bit
• A/d Channels Available: 8
• Data Rom Size: 256 B
• Interface Type: SCI, SPI
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 32
• Number Of Timers: 4 bit
• Program Memory Type: Flash
• Factory Pack Quantity: 13
• Supply Voltage - Max: 5 V
• Supply Voltage - Min: 3.2 V

ST72334J/N, ST72314J/N, ST72124J
18 DEVICE CONFIGURATION AND ORDERING INFORMATION
Each device is available for production in user pro-
grammable versions (FLASH) as well as in factory
coded versions (ROM). E
and FLASH devices are shipped to customers with
a default content (FFh), while ROM factory coded
parts contain the code supplied by the customer.
This implies that FLASH devices have to be con-
figured by the customer using the Option Bytes
while the ROM devices are factory-configured.
18.1 OPTION BYTES
The two option bytes allow the hardware configu-
ration of the microcontroller to be selected.
The option bytes have no address in the memory
map and can be accessed only in programming
mode (for example using a standard ST7 program-
ming tool). The default content of the FLASH is
fixed to FFh.
In masked ROM devices, the option bytes are
fixed in hardware by the ROM code (see option
list).
USER OPTION BYTE 0
Bit 7:2 = Reserved, must always be 1.
Bit 1 = 56/42 Package Configuration .
This option bit allows to configured the device ac-
cording to the package.
0: 42 or 44 pin packages
1: 56 or 64 pin packages
Bit 0 = FMP Full memory protection.
This option bit enables or disables external access
to the internal program memory (read-out protec-
tion). Clearing this bit causes the erasing (by over-
writing with the currently latched values) of the
whole memory (not including the option bytes).
0: Program memory not read-out protected
1: Program memory read-out protected
Note: The data E2PROM is not protected by this
bit in flash devices. In ROM devices, a protection
can be selected in the Option List (see
144/153
Default
Value
1
7
1
USER OPTION BYTE 0
Reserved
1
2
PROM data memory
1
1
page
1
56/42 FMP CSS
146).
X
0
0
This option bit enables or disables the CSS fea-
tures.
0: CSS enabled
1: CSS disabled
Bit 6:4 = OSC[2:0] Oscillator selection
These three option bits can be used to select the
main oscillator as shown in
Bit 3:2 = LVD[1:0] Low voltage detection selection
These option bits enable the LVD block with a se-
lected threshold as shown in
Bit 1 = WDG HALT Watchdog Reset on HALTt
mode
This option bit determines if a RESET is generated
when entering HALT mode while the Watchdog is
active.
0: No Reset generation when entering Halt mode
1: Reset generation when entering Halt mode
Bit 0 = WDG SW Hardware or software watchdog
This option bit selects the watchdog type.
0: Hardware (watchdog always enabled)
1: Software (watchdog to be enabled by software)
Table 24. Main Oscillator Configuration
Table 25. LVD Threshold Configuration
USER OPTION BYTE 1
Bit 7 = CSS Clock Security System disable
External Clock (Stand-by)
~4 MHz Internal RC
1~14 MHz External RC
Low Power Resonator (LP)
Medium Power Resonator (MP)
Medium Speed Resonator (MS)
High Speed Resonator (HS)
LVD Off
Highest Voltage Threshold ( 4.50V)
Medium Voltage Threshold ( 4.05V)
Lowest Voltage Threshold ( 3.45V)
7
1
Selected Oscillator
OSC
2
1
Configuration
OSC
USER OPTION BYTE 1
1
1
OSC
0
0
LVD1 LVD0
Table
1
Table
OSC2 OSC1 OSC0
1
1
1
0
0
0
0
24.
1
25.
HALT
WDG
LVD1 LVD0
1
1
0
1
1
0
0
1
1
1
0
0
WDG
SW
X
1
0
1
0
1
0
1
0
1
0
1
0