CY7C0851AV-133AXC Cypress Semiconductor Corp, CY7C0851AV-133AXC Datasheet - Page 18

• Manufacturer Part Number: CY7C0851AV-133AXC
• Description: IC SRAM 2MBIT 133MHZ 176LQFP
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C0851AV-133AXC

• Format - Memory: RAM
• Memory Type: SRAM - Dual Port, Synchronous
• Memory Size: 2M (64K x 36)
• Speed: 133MHz
• Interface: Parallel
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 176-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Switching Waveforms
Notes
Document #: 38-06070 Rev. *H
26. In this depth-expansion example, B1 represents Bank #1 and B2 is Bank #2; each bank consists of one Cypress CY7C0851AV/CY7C0852AV device from this data
27. ADS = CNTEN= B0 – B3 = OE = LOW; MRST = CNTRST = CNT/MSK = HIGH.
28. Output state (HIGH, LOW, or high-impedance) is determined by the previous cycle control signals.
29. During “No Operation,” data in memory at the selected address may be corrupted and should be rewritten to ensure data integrity.
30. CE
31. CE
sheet. ADDRESS
(labelled as no operation). One clock cycle is required to three-state the I/O for the Write operation on the next rising edge of CLK.
ADDRESS
ADDRESS
0
DATA
DATA
0
= B0 – B3 = R/W = LOW; CE
= OE = B0 – B3 = LOW; CE
ADDRESS
DATA
OUT(B2)
OUT(B1)
CE
CE
DATA
CLK
(B1)
(B1)
(B2)
(B2)
CLK
R/W
OUT
CE
(B1)
IN
= ADDRESS
t
t
t
t
SA
SC
SA
SC
t
t
t
SW
SC
SA
A
A
A
0
0
1
1
n
t
(B2)
= CNTRST = MRST = CNT/MSK = HIGH. When R/W first switches low, since OE = LOW, the Write operation cannot be completed
CH2
= R/W = CNTRST = MRST = HIGH.
t
CH2
(continued)
.
Figure 11. Read-to-Write-to-Read (OE = LOW)
t
t
t
t
t
t
CYC2
CYC2
t
HA
HC
HA
HC
t
t
HW
HC
HA
t
t
CL2
CL2
A
A
READ
A
n+1
1
1
t
CD2
Figure 10. Bank Select Read
t
CD2
t
SW
t
SC
Q
n
Q
t
0
SC
A
n+2
A
t
A
CKHZ
NO OPERATION
2
2
t
t
DC
HC
t
HW
t
HC
t
CD2
t
SD
A
D
n+2
n+2
Q
t
[26, 27]
HD
A
A
1
3
t
3
t
DC
t
CKLZ
CKHZ
WRITE
t
[25, 28, 29, 30, 31]
CD2
CY7C0850AV, CY7C0851AV
CY7C0852AV, CY7C0853AV
t
CKLZ
A
n+3
t
CD2
Q
A
A
4
2
4
t
t
t
CD2
CKHZ
CKLZ
READ
Q
n+1
A
Q
n+4
3
t
CD2
A
A
5
t
5
CKLZ
t
t
CKHZ
CD2
Q
n+3
Page 18 of 32
Q
4
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