CY7C026AV-25AXI Cypress Semiconductor Corp, CY7C026AV-25AXI Datasheet - Page 15

• Manufacturer Part Number: CY7C026AV-25AXI
• Description: IC SRAM 256KBIT 25NS 100LQFP
• Manufacturer: Cypress Semiconductor Corp
• Type: Asynchronousr

Specifications of CY7C026AV-25AXI

• Memory Size: 256K (16K x 16)
• Package / Case: 100-LQFP
• Format - Memory: RAM
• Memory Type: SRAM - Dual Port, Asynchronous
• Speed: 25ns
• Interface: Parallel
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Access Time: 25 ns
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 3 V
• Maximum Operating Current: 185 mA
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Number Of Ports: 2
• Operating Supply Voltage: 3.3 V
• Supply Voltage Range: 3V To 3.6V
• Memory Case Style: TQFP
• No. Of Pins: 100
• Operating Temperature Range: -40°C To +85°C
• Memory Configuration: 16K X 16
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 428-2097; CY7C026AV-25AXI

Switching Waveforms
Document #: 38-06052 Rev. *M
Left Address Valid First:
CE
Right Address Valid First:
CE
Note
48. If t
ADDRESS
ADDRESS
R
L
Valid First
ADDRESS
ADDRESS
ADDRESS
ADDRESS
Valid First:
PS
BUSY
BUSY
BUSY
BUSY
is violated, the busy signal is asserted on one side or the other, but there is no guarantee to which side BUSY is asserted.
CE
CE
CE
CE
L,R
L,R
R
R
R
L
L
L
R
L
R
R
L
L
Figure 15. Busy Timing Diagram No.2 (Address Arbitration)
(continued)
Figure 14. Busy Timing Diagram No.1 (CE Arbitration)
t
t
PS
PS
ADDRESS MATCH
ADDRESS MATCH
t
t
RC
RC
or t
or t
t
t
PS
PS
WC
WC
t
t
BLA
BLA
ADDRESS MATCH
ADDRESS MATCH
t
t
BLC
BLC
ADDRESS MISMATCH
ADDRESS MISMATCH
t
t
BHA
BHA
CY7C024AV/024BV/025AV/026AV
t
t
BHC
BHC
CY7C0241AV/0251AV/036AV
[48]
[48]
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