CY7C026AV-25AXI Cypress Semiconductor Corp, CY7C026AV-25AXI Datasheet - Page 10

• Manufacturer Part Number: CY7C026AV-25AXI
• Description: IC SRAM 256KBIT 25NS 100LQFP
• Manufacturer: Cypress Semiconductor Corp
• Type: Asynchronousr

Specifications of CY7C026AV-25AXI

• Memory Size: 256K (16K x 16)
• Package / Case: 100-LQFP
• Format - Memory: RAM
• Memory Type: SRAM - Dual Port, Asynchronous
• Speed: 25ns
• Interface: Parallel
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Access Time: 25 ns
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 3 V
• Maximum Operating Current: 185 mA
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Number Of Ports: 2
• Operating Supply Voltage: 3.3 V
• Supply Voltage Range: 3V To 3.6V
• Memory Case Style: TQFP
• No. Of Pins: 100
• Operating Temperature Range: -40°C To +85°C
• Memory Configuration: 16K X 16
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 428-2097; CY7C026AV-25AXI

Switching Characteristics
Over the Operating Range (continued)
Data Retention Mode
The
CY7C0241AV/0251AV/036AV are designed for battery backup.
Data retention voltage and supply current are guaranteed over
temperature. The following rules ensure data retention:
Notes
Document #: 38-06052 Rev. *M
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
1. Chip Enable (CE) must be held HIGH during data retention,
2. CE must be kept between V
3. The RAM can begin operation >t
25. For information on port to port delay through RAM cells from writing port to reading port, refer to
26. Test conditions used are Load 2.
27. t
28. CE = V
PWE
SD
HD
HZWE
LZWE
WDD
DDD
BLA
BHA
BLC
BHC
PS
WB
WH
BDD
INS
INR
SOP
SWRD
SPS
SAA
Busy Timing
Interrupt Timing
Semaphore Timing
within V
during the power up and power down transitions.
minimum operating voltage (3.0V).
BDD
[27]
[25]
Parameter
[25]
[23, 24]
[23, 24]
is a calculated parameter and is the greater of t
CC
CC
, V
in
to V
= GND to V
[26]
CY7C024AV/024BV/025AV/026AV
CC
[26]
– 0.2V.
Write Pulse Width
Data Setup to Write End
Data Hold From Write End
R/W LOW to High Z
R/W HIGH to Low Z
Write Pulse to Data Delay
Write Data Valid to Read Data Valid
BUSY LOW from Address Match
BUSY HIGH from Address Mismatch
BUSY LOW from CE LOW
BUSY HIGH from CE HIGH
Port Setup for Priority
R/W HIGH after BUSY (Slave)
R/W HIGH after BUSY HIGH (Slave)
BUSY HIGH to Data Valid
INT Set Time
INT Reset Time
SEM Flag Update Pulse (OE or SEM)
SEM Flag Write to Read Time
SEM Flag Contention Window
SEM Address Access Time
CC
, T
A
= 25C. This parameter is guaranteed but not tested.
CC
– 0.2V and 70 percent of V
RC
[20]
after V
Description
WDD
CC
– t
reaches the
PWE
(actual) or t
and
CC
DDD
– t
Timing
SD
V
CE
ICC
CC
(actual).
Parameter
DR1
CY7C024AV/024BV/025AV/026AV
Min
Figure
15
15
15
10
0
3
5
0
5
5
CY7C024AV/024BV/025AV/026AV
CY7C0241AV/0251AV/036AV
12.
CY7C0241AV/0251AV/036AV
-20
3.0V
at VCC
Data Retention Mode
Test Conditions
Max
V
12
45
30
20
20
20
17
20
20
20
20
CC
V
to V
CC
DR
2.0V
CC
= 2V
– 0.2V
Min
20
15
17
12
5
5
5
0
0
0
[28]
3.0V
-25
Max
15
50
35
20
20
20
17
25
20
20
25
Max
50
V
t
IH
Page 10 of 20
RC
Unit
A
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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