CY62167EV30LL-45BVXI Cypress Semiconductor Corp, CY62167EV30LL-45BVXI Datasheet

IC SRAM 16MBIT 45NS 48VFBGA

CY62167EV30LL-45BVXI

Manufacturer Part Number
CY62167EV30LL-45BVXI
Description
IC SRAM 16MBIT 45NS 48VFBGA
Manufacturer
Cypress Semiconductor Corp
Type
Asynchronousr
Datasheet

Specifications of CY62167EV30LL-45BVXI

Memory Size
16M (2M x 8 or 1M x 16)
Package / Case
48-VFBGA
Format - Memory
RAM
Memory Type
SRAM
Speed
45ns
Interface
Parallel
Voltage - Supply
2.2 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Access Time
45 ns
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.2 V
Maximum Operating Current
30 mA
Organization
1 M x 16
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Number Of Ports
1
Operating Supply Voltage
2.5 V or 3.3 V
Memory Configuration
2M X 8 / 1M X 16
Supply Voltage Range
2.2V To 3.6V
Memory Case Style
BGA
No. Of Pins
48
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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16-Mbit (1M x 16 / 2M x 8) Static RAM
Features
Functional Description
The CY62167EV30 is a high performance CMOS static RAM
organized as 1M words by 16 bits or 2M words by 8 bits. This
device features an advanced circuit design that provides an ultra
low active current. Ultra low active current is ideal for providing
Cypress Semiconductor Corporation
Document #: 38-05446 Rev. *I
TSOP I package configurable as 1M × 16 or 2M x 8 SRAM
Very high speed: 45 ns
Temperature ranges
Wide voltage range: 2.20 V to 3.60 V
Ultra-low standby power
Ultra-low active power
Easy memory expansion with CE
Automatic power-down when deselected
CMOS for optimum speed and power
Offered in Pb-free 48-Ball VFBGA and 48-Pin TSOP I packages
Logic Block Diagram
Industrial: –40°C to +85°C
Automotive-A: –40°C to +85°C
Typical standby current: 1.5 μA
Maximum standby current: 12 μA
Typical active current: 2.2 mA at f = 1 MHz
Power Down
Circuit
A
A
A
A
A
A
A
A
A
A
A
10
1
9
8
7
6
5
4
3
2
1
0
, CE
2
, and OE Features
CE
CE
BHE
BLE
2
1
198 Champion Court
COLUMN DECODER
DATA IN DRIVERS
1M × 16 / 2M x 8
16-Mbit (1M x 16 / 2M x 8) Static RAM
RAM Array
More Battery Life™ (MoBL
cellular telephones. The device also has an automatic power
down feature that reduces power consumption by 99 percent
when addresses are not toggling. Place the device into standby
mode when deselected (CE
BLE are HIGH). The input and output pins (I/O
are placed in a high impedance state when: the device is
deselected (CE
HIGH), both Byte High Enable and Byte Low Enable are disabled
(BHE, BLE HIGH), or a write operation is in progress (CE
CE
To write to the device, take Chip Enables (CE
HIGH) and Write Enable (WE) input LOW. If Byte Low Enable
(BLE) is LOW, then data from I/O pins (I/O
written into the location specified on the address pins (A
A
pins (I/O
the address pins (A
To read from the device, take Chip Enables (CE
HIGH) and Output Enable (OE) LOW while forcing the Write
Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW, then data
from the memory location specified by the address pins appears
on I/O
memory appears on I/O
page 11 for a complete description of read and write modes.
For best practice recommendations, refer to the Cypress
application note
19
2
). If Byte High Enable (BHE) is LOW, then data from the I/O
HIGH and WE LOW).
0
to I/O
8
through I/O
San Jose
7
. If Byte High Enable (BHE) is LOW, then data from
1
AN1064, SRAM System Design
HIGH or CE
0
through A
,
15
CA 95134-1709
) is written into the location specified on
8
CY62167EV30 MoBL
1
®
to I/O
HIGH or CE
) in portable applications such as
2
19
LOW), outputs are disabled (OE
).
15
I/O
I/O
OE
BLE
BYTE
BHE
WE
. See the
0
8
–I/O
–I/O
Revised August 13, 2010
2
LOW or both BHE and
7
15
0
“Truth Table”
1
through I/O
0
1
LOW and CE
Guidelines.
LOW and CE
through I/O
408-943-2600
CE
CE
2
1
0
through
1
LOW,
7
) is
®
15
on
2
2
[+] Feedback
[+] Feedback
)

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CY62167EV30LL-45BVXI Summary of contents

Page 1

... Power Down Circuit Cypress Semiconductor Corporation Document #: 38-05446 Rev. *I 16-Mbit ( Static RAM More Battery Life™ (MoBL cellular telephones. The device also has an automatic power down feature that reduces power consumption by 99 percent when addresses are not toggling. Place the device into standby mode when deselected (CE BLE are HIGH) ...

Page 2

Contents Pin Configuration ............................................................. 3 Product Portfolio .............................................................. 3 Maximum Ratings............................................................. 4 Operating Range............................................................... 4 Electrical Characteristics................................................. 4 Capacitance ...................................................................... 4 Thermal Resistance.......................................................... 5 Data Retention Characteristics ....................................... 6 Switching Characteristics................................................ 7 Switching Waveforms ...................................................... 8 Truth Table ...................................................................... 11 ...

Page 3

... Product Portfolio Product Range CY62167EV30LL Industrial/Auto-A Notes 1. Ball H6 for the VFBGA package can be used to upgrade to a 32M density pins are not connected on the die. 3. The BYTE pin in the 48-pin TSOPI package has to be tied to V SRAM by tying the BYTE signal the configuration, Pin 45 is A20, while BHE, BLE and I ...

Page 4

... Tested initially and after any design or process changes that may affect these parameters. Document #: 38-05446 Rev input voltage Output current into outputs (LOW) ............................. 20 mA Static discharge voltage........................................... >2001 V (MIL-STD-883, Method 3015) Latch-up current ...................................................... >200 mA Operating Range Device + 0 (max) CY62167EV30LL + 0 (max) Test Conditions 2.2 < V < 2 –0 2.7 < V < 3 – ...

Page 5

Thermal Resistance [12] Parameter Description Θ Thermal resistance Still air, soldered × 4.5 inch, JA (Junction to ambient) two-layer printed circuit board Θ Thermal resistance JC (Junction to case OUTPUT INCLUDING ...

Page 6

Data Retention Characteristics Over the Operating Range Parameter Description V V for data retention DR CC [14] I Data retention current V CCDR (BHE and BLE) > ...

Page 7

... HZBE HZWE 22. The internal write time of the memory is defined by the overlap of WE, CE write and any of these signals can terminate a write by going INACTIVE. The data input setup and hold timing must refer to the edge of the signal that terminates the write. Document #: 38-05446 Rev. *I ...

Page 8

Switching Waveforms Figure 5. Read Cycle No. 1 (Address Transition Controlled) ADDRESS DATA OUT PREVIOUS DATA VALID Figure 6. Read Cycle No. 2 (OE Controlled) ADDRESS ACE BHE/BLE t LZBE OE t LZOE HIGH IMPEDANCE ...

Page 9

... HZOE Notes 26. The internal write time of the memory is defined by the overlap of WE, CE write and any of these signals can terminate a write by going INACTIVE. The data input setup and hold timing must refer to the edge of the signal that terminates the write 27. Data I/O is high impedance ...

Page 10

Switching Waveforms (continued) Figure 9. Write Cycle No. 3 (WE controlled, OE LOW) ADDRESS BHE/BLE NOTE 31 DATA I/O Figure 10. Write Cycle No. 4 (BHE/BLE controlled, OE LOW) ADDRESS ...

Page 11

Truth Table BHE BLE 1 2 [32 [32 [32] [32 ...

Page 12

... Ordering Information Speed (ns) Ordering Code 45 CY62167EV30LL-45BVI CY62167EV30LL-45BVXI CY62167EV30LL-45ZXI CY62167EV30LL-45BVXA CY62167EV30LL-45ZXA Ordering Code Definition 45 V30 LL CY 621 Document #: 38-05446 Rev. *I Package Package Type Diagram 51-85150 48-ball VFBGA (6 × 8 × 1 mm) 51-85150 48-ball VFBGA (6 × 8 × 1 mm) (Pb-free) 51-85183 48-pin TSOP I (Pb-free) 51-85150 48-ball VFBGA (6 × ...

Page 13

Package Diagrams Figure 11. 48-Ball VFBGA ( mm), 51-85150 Document #: 38-05446 Rev. *I ® CY62167EV30 MoBL 51-85150-*E Page [+] Feedback [+] Feedback ...

Page 14

... BLE byte low enable CMOS complementary metal oxide semiconductor CE chip enable I/O input/output OE output enable SRAM static random access memory TSOP thin small outline package VFBGA very fine ball grid array WE write enable Document #: 38-05446 Rev. *I ® CY62167EV30 MoBL 51-85183-*B Page ...

Page 15

Document History Page Document Title: CY62167EV30 MoBL Document Number: 38-05446 Orig. of Submission Rev. ECN No. Change ** 202600 AJU 01/23/2004 *A 463674 NXR *B 469169 NSI *C 1130323 VKN *D 1323984 VKN/AESA *E 2678799 VKN/PYRS 03/25/2009 *F 2720234 VKN/AESA ...

Page 16

... Cypress against all charges. Any Source Code (software and/or firmware) is owned by Cypress Semiconductor Corporation (Cypress) and is protected by and subject to worldwide patent protection (United States and foreign), United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement ...

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