CY7C1020DV33-10ZSXI Cypress Semiconductor Corp, CY7C1020DV33-10ZSXI Datasheet
CY7C1020DV33-10ZSXI
Specifications of CY7C1020DV33-10ZSXI
CY7C1020DV33-10ZSXI
Available stocks
Related parts for CY7C1020DV33-10ZSXI
CY7C1020DV33-10ZSXI Summary of contents
Page 1
... HIGH), the outputs are disabled (OE HIGH), the BHE and BLE are disabled (BHE, BLE HIGH), or during a write operation (CE LOW, and WE LOW). The CY7C1020DV33 is available in Pb-free 44-pin 400-Mil wide Molded SOJ and 44-pin TSOP II packages. I/O –I/O ...
Page 2
... MAX RC 66 MHz 40 MHz Max > > < MAX Max > V – 0.3V > V – 0.3V < 0.3V CY7C1020DV33 [3] –12 (Automotive) Unit 12 ns 100 Ambient V Speed CC Temperature 3.3V 0.3V – + – +125 –12 (Automotive) Unit Max. Min. Max. 2.4 V 0.4 0 0.3 2 ...
Page 3
... Test Conditions Still Air, soldered × 4.5 inch, four-layer printed circuit board [6] 3.0V GND 30 pF* Rise Time: 1 V/ns High-Z characteristics: R 317 3.3V OUTPUT 351 (c) CY7C1020DV33 Max. Unit SOJ TSOP II Unit C/W 59.52 53.91 C/W 36.75 21.24 ALL INPUT PULSES ...
Page 4
... Write. The input data set-up and hold timing should be referenced to the leading edge of the signal that terminates the Write. Document #: 38-05461 Rev. *F [7] –10 (Industrial) Min. Max. 100 values until the first memory access can be performed CC is less than less than t , and t HZCE LZCE HZOE LZOE HZWE CY7C1020DV33 –12 (Automotive) Unit Min. Max. s 100 ...
Page 5
... CE > V – 0.3V > V – 0. < 0. DATA RETENTION MODE 3.0V > CDR [14, 15 OHA t RC DOE DATA VALID 50% > 50 s or stable at V > 50 CC(min.) CC(min CY7C1020DV33 Min. Max. Unit 2 Industrial 15 mA Automotive 3. DATA VALID t HZOE t HZCE t HZBE HIGH IMPEDANCE 50 Page [+] Feedback ...
Page 6
... Write Cycle No. 2 (BLE or BHE Controlled) ADDRESS t SA BHE, BLE WE CE DATA I/O Notes: 17. Data I/O is high impedance BHE and/or BLE = V 18 goes HIGH simultaneously with WE going HIGH, the output remains in a high-impedance state. Document #: 38-05461 Rev SCE PWE PWE t SCE CY7C1020DV33 Page [+] Feedback ...
Page 7
... Read—All bits High-Z Read—Lower bits only Data Out Read—Upper bits only Data In Write—All bits High-Z Write—Lower bits only Data In Write—Upper bits only High-Z Selected, Outputs Disabled High-Z Selected, Outputs Disabled CY7C1020DV33 LZWE Mode Power Standby ( Active ( ...
Page 8
... Ordering Information Speed Ordering Code (ns) 10 CY7C1020DV33-10VXI CY7C1020DV33-10ZSXI 12 CY7C1020DV33-12ZSXE Ordering Code Definitions V33 - XX XX Shaded areas contain advance information. Please contact your local Cypress sales representative for availability of these parts. Document #: 38-05461 Rev. *F Package Package Type Name 51-85082 44-pin (400-Mil) Molded SOJ (Pb-free) ...
Page 9
... Package Diagrams Figure 1. 44-pin (400-Mil) Molded SOJ (51-85082) Document #: 38-05461 Rev. *F CY7C1020DV33 51-85082 *C Page [+] Feedback ...
Page 10
... Package Diagrams (continued) Figure 2. 44-Pin Thin Small Outline Package Type II (51-85087) All product and company names mentioned in this document may be the trademarks of their respective holders. Document #: 38-05461 Rev. *F CY7C1020DV33 51-85087 *C Page [+] Feedback ...
Page 11
... Document History Page Document Title: CY7C1020DV33, 512K (32K x 16) Static RAM Document Number: 38-05461 REV. ECN NO. Issue Date ** 201560 See ECN *A 233695 See ECN *B 262950 See ECN *C 307596 See ECN *D 560995 See ECN *E 2898399 03/24/2010 *F 3109992 12/14/2010 Document #: 38-05461 Rev. *F Orig. of ...
Page 12
... The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. cypress.com/go/plc CY7C1020DV33 PSoC Solutions psoc.cypress.com/solutions ...