CY7C1020-10ZC Cypress Semiconductor Corporation., CY7C1020-10ZC Datasheet

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CY7C1020-10ZC

Manufacturer Part Number
CY7C1020-10ZC
Description
32K x 16 static RAM, 10ns
Manufacturer
Cypress Semiconductor Corporation.
Datasheet
7C10
Features
Functional Description
The CY7C1020 is a high-performance CMOS static RAM or-
ganized as 32,768 words by 16 bits. This device has an auto-
matic power-down feature that significantly reduces power
consumption when deselected.
Writing to the device is accomplished by taking Chip Enable
(CE) and Write Enable (WE) inputs LOW. If Byte Low Enable
Selection Guide
Cypress Semiconductor Corporation
Logic Block Diagram
Maximum Access Time (ns)
Maximum Operating Current (mA)
Maximum CMOS Standby Current (mA)
• 5.0V operation (± 10%)
• High speed
• Low active power
• Very Low standby power
• Automatic power-down when deselected
• Independent Control of Upper and Lower bytes
• Available in 44-pin TSOP II and 400-mil SOJ
A
A
A
A
A
A
A
— t
— 825 mW (max., 10 ns, “L” version)
— 550 W (max., “L” version)
2
1
0
6
5
4
3
AA
= 10 ns
DATA IN DRIVERS
COLUMN DECODER
RAM Array
32K x 16
L
L
3901 North First Street
7C1020-10
180
150
0.1
10
3
(BLE) is LOW, then data from I/O pins (I/O
written into the location specified on the address pins (A
through A
from I/O pins (I/O
specified on the address pins (A
Reading from the device is accomplished by taking Chip En-
able (CE) and Output Enable (OE) LOW while forcing the Write
Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW, then
data from the memory location specified by the address pins
will appear on I/O
then data from memory will appear on I/O
truth table at the back of this data sheet for a complete descrip-
tion of read and write modes.
The input/output pins (I/O
high-impedance state when the device is deselected (CE
HIGH), the outputs are disabled (OE HIGH), the BHE and BLE
are disabled (BHE, BLE HIGH), or during a write operation (CE
LOW, and WE LOW).
The CY7C1020 is available in standard 44-pin TSOP type II
and 400-mil-wide SOJ packages.
7C1020-12
I/O
I/O
14
1
9
BHE
WE
CE
OE
BLE
San Jose
). If Byte High Enable (BHE) is LOW, then data
170
140
0.1
– I/O
– I/O
12
3
1020-1
8
16
1
9
to I/O
through I/O
32K x 16 Static RAM
8
I/O
I/O
I/O
I/O
V
I/O
I/O
I/O
I/O
A
A
A
V
Pin Configuration
A
A
NC
WE
NC
CE
. If Byte High Enable (BHE) is LOW,
CC
A
A
11
SS
A
12
13
10
14
1
1
2
3
4
5
6
7
8
8
9
7
7C1020-15
CA 95134
through I/O
SOJ / TSOP II
13
14
15
16
17
18
19
20
21
22
1
2
3
4
5
6
7
8
9
10
11
12
160
130
16
0.1
Top View
15
0
3
) is written into the location
through A
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
16
CY7C1020
9
A
A
A
OE
BHE
BLE
I/O
I/O
I/O
I/O
V
V
I/O
I/O
I/O
I/O
NC
A
A
A
A
NC
) are placed in a
1
14
October 18, 1999
0
1
2
SS
CC
3
4
5
6
to I/O
through I/O
16
15
14
13
12
11
10
9
).
7C1020-20
408-943-2600
16
160
130
0.1
20
3
. See the
1020-2
8
), is
0

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CY7C1020-10ZC Summary of contents

Page 1

... The input/output pins (I/O high-impedance state when the device is deselected (CE HIGH), the outputs are disabled (OE HIGH), the BHE and BLE are disabled (BHE, BLE HIGH), or during a write operation (CE LOW, and WE LOW). The CY7C1020 is available in standard 44-pin TSOP type II and 400-mil-wide SOJ packages. I/O – I/O 1 I/O – ...

Page 2

... RC Max > > < MAX Max > V – 0.3V > V – 0.3V < 0.3V CY7C1020 Ambient [2] Temperature +70 C 4.5V–5.5V 7C1020-12 7C1020-15 Max. Min. Max. Min. Max. 2.4 2.4 0.4 0.4 0.4 6.0 2.2 6.0 2.2 6.0 0.8 –0.5 0.8 –0.5 0.8 +1 –1 +1 –1 ...

Page 3

... CC V > V – 0.3V < 0.3V Test Conditions MHz 5. 481 5V 3. GND 255 <3 ns (b) 1020-3 167 1.73V CY7C1020 7C1020-20 Min. Max. Unit 2.4 V 0.4 V 2.2 6.0 V –0.5 0.8 V – – 160 mA L 130 ...

Page 4

... HZCE LZCE HZOE LZOE HZWE 4 CY7C1020 7C1020-15 7C1020-20 Max. Min. Max. Min. Max. Unit ...

Page 5

... Device is continuously selected. OE, CE, BHE and/or BHE = HIGH for read cycle. 10. Address valid prior to or coincident with CE transition LOW OHA DOE LZOE DATA VALID 50 CY7C1020 DATA VALID 1020-5 t HZOE t HZCE t HZBE HIGH IMPEDANCE ICC CC 50% I ISB SB ...

Page 6

... Data I/O is high impedance BHE and/or BLE goes HIGH simultaneously with WE going HIGH, the output remains in a high-impedance state SCE PWE PWE t SCE CY7C1020 1020 1020-8 ...

Page 7

... Read - Lower bits only Data Out Read - Upper bits only Data In Write - All bits High Z Write - Lower bits only Data In Write - Upper bits only High Z Selected, Outputs Disabled High Z Selected, Outputs Disabled 7 CY7C1020 LZWE 1020-10 Mode Power Standby (I SB ...

Page 8

... Ordering Information Speed (ns) Ordering Code 10 CY7C1020-10VC CY7C1020L-10VC CY7C1020-10ZC CY7C1020L-10ZC 12 CY7C1020-12VC CY7C1020L-12VC CY7C1020-12ZC CY7C1020L-12ZC 15 CY7C1020-15VC CY7C1020L-15VC CY7C1020-15ZC CY7C1020L-15ZC 20 CY7C1020-20VC CY7C1020L-20VC CY7C1020-20ZC CY7C1020L-20ZC Document #: 38-00542-C Package Diagrams Package Name Package Type V34 44-Lead (400-Mil) Molded SOJ V34 44-Lead (400-Mil) Molded SOJ Z44 44-Lead TSOP Type II ...

Page 9

... The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. 44-Pin TSOP II Z44 CY7C1020 51-85087-A ...

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