S9S08DZ60F2MLF Freescale Semiconductor, S9S08DZ60F2MLF Datasheet - Page 61
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S9S08DZ60F2MLF
Manufacturer Part Number
S9S08DZ60F2MLF
Description
8-bit Microcontrollers - MCU M74K MASK ONLY-AUTO
Manufacturer
Freescale Semiconductor
Datasheet
1.S9S08DZ60F2MLH.pdf
(416 pages)
Specifications of S9S08DZ60F2MLF
Rohs
yes
Core
HCS08
Data Bus Width
8 bit
Maximum Clock Frequency
40 MHz
Program Memory Size
60 KB
Data Ram Size
4 K
On-chip Adc
Yes
Operating Supply Voltage
2.7 V to 5.5 V
Operating Temperature Range
- 40 C to + 125 C
Package / Case
LQFP-48
Mounting Style
SMD/SMT
Processor Series
MC9S08DZ60
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4.5.10
Only half of the EEPROM is in the memory map. The EPGSEL bit in FCNFG register selects which half
of the array can be accessed in foreground while the other half can not be accessed in background. There
are two mapping mode options that can be selected to configure the 8-byte EEPROM sectors: 4-byte mode
and 8-byte mode. Each mode is selected by the EPGMOD bit in the FOPT register.
In 4-byte sector mode (EPGMOD = 0), each 8-byte sector splits four bytes on foreground and four bytes
on background but on the same addresses. The EPGSEL bit selects which four bytes can be accessed.
During a sector erase, the entire 8-byte sector (four bytes in foreground and four bytes in background) is
erased.
In 8-byte sector mode (EPGMOD = 1), each entire 8-byte sector is in a single page. The EPGSEL bit
selects which sectors are on background. During a sector erase, the entire 8-byte sector in foreground is
erased.
4.5.11
The Flash and EEPROM modules have seven 8-bit registers in the high-page register space and three
locations in the nonvolatile register space in Flash memory. Two of those locations are copied into two
corresponding high-page control registers at reset. There is also an 8-byte comparison key in Flash
memory. Refer to
registers. This section refers to registers and control bits only by their names. A Freescale
Semiconductor-provided equate or header file normally is used to translate these names into the
appropriate absolute addresses.
4.5.11.1
Bit 7 of this register is a read-only flag. Bits 6:0 may be read at any time but can be written only one time.
Before any erase or programming operations are possible, write to this register to set the frequency of the
clock for the nonvolatile memory system within acceptable limits.
Freescale Semiconductor
Reset
W
R
DIVLD
EEPROM Mapping
Flash and EEPROM Registers and Control Bits
Flash and EEPROM Clock Divider Register (FCDIV)
0
7
Table 4-3
= Unimplemented or Reserved
Figure 4-5. Flash and EEPROM Clock Divider Register (FCDIV)
PRDIV8
0
6
and
Table 4-5
MC9S08DZ60 Series Data Sheet, Rev. 4
0
5
for the absolute address assignments for all Flash and EEPROM
0
4
3
0
DIV
0
2
0
1
Chapter 4 Memory
0
0
61
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