C8051F587-IMR Silicon Labs, C8051F587-IMR Datasheet - Page 226
![no-image](/images/no-image-200.jpg)
C8051F587-IMR
Manufacturer Part Number
C8051F587-IMR
Description
8-bit Microcontrollers - MCU 50 MIPS 96 kB 8 kB SPI 2xUART
Manufacturer
Silicon Labs
Datasheet
1.C8051F585-IQR.pdf
(356 pages)
Specifications of C8051F587-IMR
Rohs
yes
Core
8051
Data Bus Width
8 bit
Processor Series
C8051
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C8051F58x/F59x
LIN Register Definition 21.8. LIN0SIZE: LIN0 Message Size Register
Indirect Address = 0x0B
226
Name
Reset
6:4
3:0
Bit
Type
7
Bit
LINSIZE[3:0] Data Field Size.
ENHCHK
ENHCHK
Unused
Name
R/W
7
0
Checksum Selection Bit.
0: Use the classic, specification 1.3 compliant checksum. Checksum covers the
data bytes.
1: Use the enhanced, specification 2.0 compliant checksum. Checksum covers data
bytes and protected identifier.
Read = 000b; Write = Don’t Care
0000: 0 data bytes
0001: 1 data byte
0010: 2 data bytes
0011: 3 data bytes
0100: 4 data bytes
0101: 5 data bytes
0110: 6 data bytes
0111: 7 data bytes
1000: 8 data bytes
1001-1110: RESERVED
1111: Use the ID[1:0] bits (LIN0ID[5:4]) to determine the data length.
R
6
0
R
5
0
Rev. 1.2
R
4
0
Function
3
0
2
0
LINSIZE[3:0]
R/W
1
0
0
0
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