MT48LC32M16A2P-75:C TR Micron Technology Inc, MT48LC32M16A2P-75:C TR Datasheet - Page 59

IC SDRAM 512MBIT 133MHZ 54TSOP

MT48LC32M16A2P-75:C TR

Manufacturer Part Number
MT48LC32M16A2P-75:C TR
Description
IC SDRAM 512MBIT 133MHZ 54TSOP
Manufacturer
Micron Technology Inc
Type
SDRAMr
Datasheet

Specifications of MT48LC32M16A2P-75:C TR

Format - Memory
RAM
Memory Type
SDRAM
Memory Size
512M (32Mx16)
Speed
133MHz
Interface
Parallel
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
0°C ~ 70°C
Package / Case
54-TSOP II
Organization
32Mx16
Density
512Mb
Address Bus
15b
Access Time (max)
6/5.4ns
Maximum Clock Rate
133MHz
Operating Supply Voltage (typ)
3.3V
Package Type
TSOP-II
Operating Temp Range
0C to 70C
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Supply Current
115mA
Pin Count
54
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
557-1078-2
Figure 43:
PDF: 09005aef809bf8f3/Source: 09005aef80818a4a
512MbSDRAM.fm - Rev. L 10/07 EN
DQML, DQMH
COMMAND
A11, A12
BA0, BA1
A0–A9,
DQM/
CLK
CKE
A10
DQ
t CKS
t CMS
t AS
t AS
t AS
ACTIVE
BANK
T0
ROW
ROW
READ – Full-Page Burst
t CKH
t CMH
t AH
t AH
t AH
t RCD
Notes:
t CL
T1
NOP
t CH
1. For this example, CL = 2.
2. x16: A11 and A12 = “Don’t Care”; x8: A12 = “Don’t Care.”
3. Page left open; no
t CMS
t CK
COLUMN m 2
T2
BANK
READ
t CMH
CAS Latency
T3
NOP
t LZ
t AC
t
RP.
T4
D
NOP
OUT
t OH
m
1,024 (x16) locations within same row
2,048 (x8) locations within same row
4,096 (x4) locations within same row
59
t AC
Full-page burst does not self-terminate.
Can use BURST TERMINATE command.
D
T5
OUT
NOP
t OH
m+1
Full page completed
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t AC
D
T6
OUT
NOP
t OH
t AC
m+2
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512Mb: x4, x8, x16 SDRAM
Tn + 1
D
NOP
OUT
t OH
m-1
t AC
©2000 Micron Technology, Inc. All rights reserved.
BURST TERM
Tn + 2
3
Dout m
Timing Diagrams
t OH
t AC
Tn + 3
D
OUT
NOP
t OH
m+1
t HZ
Don’t Care
Undefined
Tn + 4
NOP

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