C8051F713-GMR Silicon Labs, C8051F713-GMR Datasheet - Page 207
![no-image](/images/no-image-200.jpg)
C8051F713-GMR
Manufacturer Part Number
C8051F713-GMR
Description
8-bit Microcontrollers - MCU 8kB 32B EEPROM Cap Sense
Manufacturer
Silicon Labs
Datasheet
1.C8051F709-GQR.pdf
(306 pages)
Specifications of C8051F713-GMR
Rohs
yes
Core
8051
Data Bus Width
8 bit
Processor Series
C8051
- Current page: 207 of 306
- Download datasheet (2Mb)
SFR Definition 28.31. P5MDIN: Port 5 Input Mode
SFR Address = 0xF6; SFR Page = F
SFR Definition 28.32. P5MDOUT: Port 5 Output Mode
SFR Address = 0x9B; SFR Page = F
Name
Reset
Name
Reset
Bit
7:0
Bit
7:0 P5MDOUT[7:0] Output Configuration Bits for P5.7–P5.0 (respectively).
Type
Type
Bit
Bit
P5MDIN[7:0]
Name
Name
7
1
7
0
Analog Configuration Bits for P5.7–P5.0 (respectively).
Port pins configured for analog mode have their weak pullup, digital driver, and
digital receiver disabled.
0: Corresponding P5.n pin is configured for analog mode.
1: Corresponding P5.n pin is not configured for analog mode.
These bits are ignored if the corresponding bit in register P5MDIN is logic 0.
0: Corresponding P5.n Output is open-drain.
1: Corresponding P5.n Output is push-pull.
6
6
1
0
5
1
5
0
Rev. 1.0
P5MDOUT[7:0]
4
1
4
0
P5MDIN[7:0]
R/W
R/W
Function
Function
3
1
3
0
C8051F70x/71x
2
1
2
0
1
1
1
0
0
1
0
0
207
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