71321LA20PF IDT, 71321LA20PF Datasheet - Page 13

• Manufacturer Part Number: 71321LA20PF
• Description: SRAM
• Manufacturer: IDT

Specifications of 71321LA20PF

• Part # Aliases: IDT71321LA20PF

Timing Waveform of BUSY Arbitration Controlled by CE Timing
Timing Waveform of BUSY Arbritration Controlled
by Address Match Timing
NOTES:
1. All timing is the same for left and right ports. Port “A” may be either left or right port. Port “B” is the opposite from port “A”.
2. If t
AC Electrical Characteristics Over the
Operating Temperature and Supply Voltage Range
NOTES:
1. 'X' in part numbers indicates power rating (SA or LA).
ADDR
BUSY
ADDR
ADDR
BUSY
INTERRUPT TIMING
t
t
t
t
AS
WR
INS
INR
AND
IDT71321SA/LA and IDT71421SA/LA
High Speed 2K x 8 Dual-Port Static RAM with Interrupts
Symbol
CE
CE
APS
"B"
"A"
"B"
"B"
"A"
"A"
"A"
"B"
is not satisified, the BUSY will be asserted on one side or the other, but there is no guarantee on which side BUSY will be asserted (IDT71321 only).
Interrupt Set Time
Interrupt Reset Time
Address Set-up Time
Write Recovery Time
t
APS
(2)
t
APS
(2)
ADDRESSES MATCH
t
BAA
t
RC
t
BAC
Parameter
(1)
or t
WC
ADDRESSES MATCH
6.42
13
t
BDC
ADDRESSES DO NOT MATCH
Industrial and Commercial Temperature Ranges
t
BDA
Min.
____
____
(1)
0
0
Com'l Only
71321X20
71421X20
Max.
____
____
20
20
Min.
____
____
0
0
71321X25
71421X25
Com'l
& Ind
(1)
2691 drw 12
2691 drw 13
Max.
____
____
25
25
2691 tbl 11a
Unit
ns
ns
ns
ns