BR24L64F-WE2 Rohm Semiconductor, BR24L64F-WE2 Datasheet - Page 16

• Manufacturer Part Number: BR24L64F-WE2
• Description: IC EEPROM 64KBIT 400KHZ 8SOP
• Manufacturer: Rohm Semiconductor

Specifications of BR24L64F-WE2

• Memory Size: 64K (8K x 8)
• Format - Memory: EEPROMs - Serial
• Memory Type: EEPROM
• Speed: 400kHz
• Interface: I²C, 2-Wire Serial
• Voltage - Supply: 1.8 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOP
• Clock Frequency: 400kHz
• Supply Voltage Range: 1.8V To 5.5V
• Memory Case Style: SOP
• No. Of Pins: 8
• Operating Temperature Range: -40°C To +85°C
• Svhc: No SVHC (18-Jun-2010)
• Package /: RoHS Compliant
• Organization: 8 Kbit x 8
• Interface Type: I2C
• Maximum Clock Frequency: 0.1 MHz
• Access Time: 3500 ns
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 1.8 V
• Maximum Operating Current: 3 mA
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Operating Supply Voltage: 1.8 V, 5.5 V
• Memory Configuration: 8K X 8
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: BR24L64F-WE2; BR24L64F-WE2TR

●Low voltage malfunction prevention function
●Vcc noise countermeasures
●Cautions on use
3. Set SDA and SCL so as not to become 'Hi-Z'.
○Bypass capacitor
(1)Described numeric values and data are design representative values, and the values are not guaranteed.
(2)We believe that application circuit examples are recommendable, however, in actual use, confirm characteristics further
(3)Absolute maximum ratings
(4)GND electric potential
(5)Terminal design
(6)Terminal to terminal shortcircuit and wrong packaging
(7)Use in a strong electromagnetic field may cause malfunction, therefore, evaluate design sufficiently.
When noise or surge gets in the power source line, malfunction may occur, therefore, for removing these, it is recommended
to attach a by pass capacitor (0.1µF) between IC Vcc and GND. At that moment, attach it as close to IC as possible.
And, it is also recommended to attach a bypass capacitor between board Vcc and GND.
LVCC circuit prevents data rewrite action at low power, and prevents wrong write. At LVCC voltage (Typ. =1.2V) or below, it
prevent data rewrite.
When the above conditions 1 and 2 cannot be observed, take the following countermeasures.
Set the voltage of GND terminal lowest at any action condition. Make sure that each terminal voltage is lower than that of
GND terminal.
If the absolute maximum ratings such as impressed voltage and action temperature range and so forth are exceeded, LSI
may be destructed. Do not impress voltage and temperature exceeding the absolute maximum ratings. In the case of fear
exceeding the absolute maximum ratings, take physical safety countermeasures such as fuses, and see to it that conditions
exceeding the absolute maximum ratings should not be impressed to LSI.
When to package LSI onto a board, pay sufficient attention to LSI direction and displacement. Wrong packaging may
destruct LSI. And in the case of shortcircuit between LSI terminals and terminals and power source, terminal and GND
owing to foreign matter, LSI may be destructed.
In consideration of permissible loss in actual use condition, carry out heat design with sufficient margin.
sufficiently. In the case of use by changing the fixed number of external parts, make your decision with sufficient margin in
consideration of static characteristics and transition characteristics and fluctuations of external parts and our LSI.
a) In the case when the above condition 1 cannot be observed. When SDA becomes 'L' at power on .
b) In the case when the above condition 2 cannot be observed.
c) In the case when the above conditions 1 and 2 cannot be observed.
After Vcc becomes stable
→Control SCL and SDA as shown below, to make SCL and SDA, 'H' and 'H'.
→After power source becomes stable, execute software reset(P11).
→Carry out a), and then carry out b).
SCL
SDA
V
Fig.61 When SCL= 'H' and SDA= 'L'
CC
t
DH
t
LOW
t
SU:DAT
After Vcc becomes stable
16/32
Fig.62 When SCL='L' and SDA='L'
t
SU:DAT