7008L20JI IDT, 7008L20JI Datasheet - Page 8

• Manufacturer Part Number: 7008L20JI
• Description: SRAM
• Manufacturer: IDT
• Type: Dual Port Static RAMr

Specifications of 7008L20JI

• Memory Size: 512 kbit
• Organization: 64 k x 8
• Access Time: 20 ns
• Supply Voltage - Max: 5.5 V
• Supply Voltage - Min: 4.5 V
• Maximum Operating Current: 50 mA
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Package / Case: PLCC-84
• Interface: TTL
• Memory Type: Asynchronous
• Part # Aliases: IDT7008L20JI

AC Test Conditions
Waveform of Read Cycles
BUSY
DATA
Timing of Power-Up Power-Down
NOTES:
1. Timing depends on which signal is asserted last, OE or CE.
2. Timing depends on which signal is de-asserted first CE or OE.
3. t
4. Start of valid data depends on which timing becomes effective last t
5. SEM = V
6. Refer to Chip Enable Truth Table.
Input Pulse Levels
Input Rise/Fall Times
Input Timing Reference Levels
Output Reference Levels
Output Load
IDT7008S/L
High-Speed 64K x 8 Dual-Port Static RAM
has no relation to valid output data.
BDD
ADDR
R/W
OUT
OUT
delay is required only in cases where the opposite port is completing a write operation to the same address location. For simultaneous read operations BUSY
OE
CE
IH
(6)
.
I
CE
I
CC
SB
(6)
t
t
t
t
AA
ACE
AOE
LZ
Figures 1 and 2
(1)
(4)
(5)
GND to 3.0V
(4)
(4)
5ns Max.
t
PU
1.5V
1.5V
AOE
3198 tbl 11
t
, t
RC
ACE
, t
t
BDD
AA
8
DATA
VALID DATA
or t
Figure 1. AC Output Test Load
(3,4)
BUSY
BDD
OUT
INT
.
Military, Industrial and Commercial Temperature Ranges
347Ω
(4)
t
PD
5V
3198 drw 05
3198 drw 08
893Ω
30pF
DATA
t
HZ
t
,
OH
OUT
(2)
Figure 2. Output Test Load
* Including scope and jig.
(for t
347Ω
LZ
, t
HZ
, t
WZ
3198 drw 07
5V
, t
3198 drw 06
OW
893Ω
5pF*
)