74ACTQ00PC_Q Fairchild Semiconductor, 74ACTQ00PC_Q Datasheet - Page 4
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74ACTQ00PC_Q
Manufacturer Part Number
74ACTQ00PC_Q
Description
Logic Gates Qd 2-Input NAND Gate
Manufacturer
Fairchild Semiconductor
Datasheet
1.74ACTQ00SC_Q.pdf
(8 pages)
Specifications of 74ACTQ00PC_Q
Product
NAND
Logic Family
74ACT
Number Of Gates
4
Number Of Lines (input / Output)
2 / 1
High Level Output Current
- 24 mA
Low Level Output Current
24 mA
Propagation Delay Time
7.5 ns
Supply Voltage - Max
5.5 V
Supply Voltage - Min
4.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
Package / Case
PDIP-14
Minimum Operating Temperature
- 40 C
Number Of Input Lines
2
Number Of Output Lines
1
©1990 Fairchild Semiconductor Corporation
74ACTQ00 Rev. 1.4
AC Electrical Characteristics
Notes:
5. Voltage range 5.0 is 5.0V ± 0.5V.
6. Skew is defined as the absolute value of the difference between the actual propagation delay for any two
Capacitance
t
OSHL
separate outputs of the same device. The specification applies to any outputs switching in the same direction,
either HIGH-to-LOW (t
Symbol
Symbol
t
t
C
PLH
PHL
C
, t
PD
IN
OSLH
Propagation Delay,
Data to Output
Propagation Delay,
Data to Output
Output to Output Skew
Input Capacitance
Power Dissipation Capacitance
Parameter
OSHL
) or LOW-to-HIGH (t
Parameter
(6)
V
CC
5.0
5.0
5.0
(V)
OSLH
(5)
). Parameter guaranteed by design.
Min.
4
2.0
2.0
V
V
CC
CC
T
C
A
= OPEN
= 5.0V
L
= +25°C,
Typ.
= 50pF
Conditions
0.5
Max.
7.5
7.5
1.0
T
A
Min.
= –40°C to +85°C,
2.0
2.0
C
L
= 50pF
Typ.
4.5
74
Max.
8.0
8.0
1.0
www.fairchildsemi.com
Units
pF
pF
Units
ns
ns
ns