MC74ACT125DR2G ON Semiconductor, MC74ACT125DR2G Datasheet

IC BUFF TRI-ST QD N-INV 14SOIC

MC74ACT125DR2G

Manufacturer Part Number
MC74ACT125DR2G
Description
IC BUFF TRI-ST QD N-INV 14SOIC
Manufacturer
ON Semiconductor
Series
74ACTr
Datasheet

Specifications of MC74ACT125DR2G

Logic Type
Buffer/Line Driver, Non-Inverting
Number Of Elements
4
Number Of Bits Per Element
1
Current - Output High, Low
24mA, 24mA
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
14-SOIC (3.9mm Width), 14-SOL
Logic Family
74ACT
Number Of Channels Per Chip
Quad
Polarity
Non-Inverting
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.5 V
Maximum Operating Temperature
85 C
Mounting Style
SMD/SMT
High Level Output Current
- 24 mA
Input Bias Current (max)
8 uA
Low Level Output Current
24 mA
Maximum Power Dissipation
500 mW
Minimum Operating Temperature
- 40 C
Number Of Lines (input / Output)
3
Output Type
3-State
Propagation Delay Time
9 ns @ 5 V
Logical Function
Buffer/Line Driver
Number Of Elements
4
Number Of Channels
4
Number Of Inputs
4
Number Of Outputs
4
Operating Supply Voltage (typ)
5V
Package Type
SOIC
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
4.5V
Quiescent Current
8uA
Technology
CMOS
Pin Count
14
Mounting
Surface Mount
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
MC74ACT125DR2GOS
MC74ACT125DR2GOS
MC74ACT125DR2GOSTR

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC74ACT125DR2G
Manufacturer:
ON/安森美
Quantity:
20 000
MC74AC125, MC74ACT125
Quad Buffer with 3−State
Outputs
Features
NOTE:
© Semiconductor Components Industries, LLC, 2006
October, 2006 − Rev. 7
PIN ASSIGNMENT
FUNCTION TABLE
PIN
A
O
Figure 1. Pinout: 14−Lead Packages Conductors
Outputs Source/Sink
′ACT125 Has TTL Compatible Inputs
Pb−Free Packages are Available
n
n
, B
A
n
H
L
L
n
H = High Voltage Level;
L = Low Voltage Level;
Z = High Impedance;
X = Immaterial
V
14
A
1
Inputs
CC
0
A
13
B
2
FUNCTION
Inputs
Outputs
2
0
B
H
X
L
n
O
B
12
3
2
0
(Top View)
O
A
11
4
2
1
A
10
B
5
3
1
Output
O
B
O
H
L
Z
9
6
n
3
1
GND
O
8
7
3
1
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
See general marking information in the device marking
section on page 5 of this data sheet.
14
14
DEVICE MARKING INFORMATION
14
14
1
ORDERING INFORMATION
1
1
http://onsemi.com
1
Publication Order Number:
CASE 751A
CASE 948G
SOEIAJ−14
DT SUFFIX
TSSOP−14
CASE 646
M SUFFIX
CASE 965
N SUFFIX
D SUFFIX
SOIC−14
PDIP−14
MC74AC125/D

Related parts for MC74ACT125DR2G

MC74ACT125DR2G Summary of contents

Page 1

MC74AC125, MC74ACT125 Quad Buffer with 3−State Outputs Features • Outputs Source/Sink • ′ACT125 Has TTL Compatible Inputs • Pb−Free Packages are Available ...

Page 2

MAXIMUM RATINGS Symbol V DC Supply Voltage (Referenced to GND Input Voltage (Referenced to GND Output Voltage (Referenced to GND) out I DC Input Current, per Pin Output Sink/Source Current, per ...

Page 3

DC CHARACTERISTICS Symbol Parameter V Minimum High Level IH Input Voltage V Maximum Low Level IL Input Voltage V Minimum High Level OH Output Voltage V Minimum Low Level OL Output Voltage I Maximum Input IN Leakage Current V (OE) ...

Page 4

DC CHARACTERISTICS Symbol Parameter V Minimum High Level IH Input Voltage V Maximum Low Level IL Input Voltage Minimum High Level V OH Output Voltage V Minimum Low Level OL Output Voltage Maximum Input I IN Leakage Current I V ...

Page 5

... MC74AC125DR2 MC74AC125DR2G MC74AC125DTR2 MC74AC125DTR2G MC74AC125M MC74AC125MG MC74AC125MEL MC74AC125MELG MC74ACT125DR2 MC74ACT125DR2G MC74ACT125DTR2 MC74ACT125DTR2G MC74ACT125MEL MC74ACT125MELG MC74ACT125N MC74ACT125NG †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *This package is inherently Pb−Free. ...

Page 6

−T− SEATING PLANE 0.13 (0.005) PACKAGE DIMENSIONS PDIP−14 CASE 646−06 ISSUE http://onsemi.com 6 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI ...

Page 7

... G −T− SEATING 14 PL PLANE 0.25 (0.010 14X 0.58 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. PACKAGE DIMENSIONS SOIC−14 CASE 751A−03 ISSUE 0.25 (0.010 ...

Page 8

... S A −V− C 0.10 (0.004) −T− SEATING G D PLANE 14X 0.36 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. PACKAGE DIMENSIONS TSSOP−14 CASE 948G−01 ISSUE 0.25 (0.010) ...

Page 9

... Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303− ...

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