MCIMX6U7CVM08AB Freescale Semiconductor, MCIMX6U7CVM08AB Datasheet - Page 6

• Manufacturer Part Number: MCIMX6U7CVM08AB
• Description: Processors - Application Specialized i.MX6 DualLite
• Manufacturer: Freescale Semiconductor
• Type: Multimedia Applicationsr

Specifications of MCIMX6U7CVM08AB

• Rohs: yes
• Core: ARM Cortex A9
• Processor Series: i.MX6
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 800 MHz
• Data Ram Size: 128 KB
• Maximum Operating Temperature: + 105
• Mounting Style: SMD/SMT
• Package / Case: MAPBGA-624
• Interface Type: I2C, I2S, UART, USB
• Memory Type: L1/L2 Cache, ROM, SRAM
• Minimum Operating Temperature: - 40 C
• Number Of Timers: 2

Introduction
1. The theoretical maximum performance of 1 Gbps ENET is limited to 470 Mbps (total for Tx and Rx) due to internal bus
throughput limitations. The actual measured performance in optimized environment is up to 400 Mbps. For details, see the
ERR004512 erratum in the i.MX 6Solo/6DualLite errata document (IMX6SDLCE).
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— MIPI/DSI, two lanes at 1 Gbps
— EPDC, Color, and monochrome E-INK, up to 1650x2332 resolution and 5-bit grayscale
Camera sensors:
— Two parallel Camera ports (up to 20 bit and up to 240 MHz peak)
— MIPI CSI-2 Serial port, supporting from 80 Mbps to 1 Gbps speed per data lane. The CSI-2
Expansion cards:
— Four MMC/SD/SDIO card ports all supporting:
USB
— One high speed (HS) USB 2.0 OTG (Up to 480 Mbps), with integrated HS USB Phy
— Three USB 2.0 (480 Mbps) hosts:
Expansion PCI Express port (PCIe) v2.0 one lane
— PCI Express (Gen 2.0) dual mode complex, supporting Root complex operations and Endpoint
Miscellaneous IPs and interfaces:
— Three I2S/SSI/AC97, up to 1.4 Mbps each
— Enhanced Serial Audio Interface (ESAI), up to 1.4 Mbps per channel
— Five UARTs, up to 4.0 Mbps each:
— Four eCSPI (Enhanced CSPI)
— Four I
— Gigabit Ethernet Controller (IEEE1588 compliant), 10/100/1000
— Four Pulse Width Modulators (PWM)
— System JTAG Controller (SJC)
— GPIO with interrupt capabilities
— 8x8 Key Pad Port (KPP)
Receiver core can manage one clock lane and up to two data lanes. Each i.MX 6Solo/6DualLite
processor has two lanes.
– 1-bit or 4-bit transfer mode specifications for SD and SDIO cards up to UHS-I SDR-104
– 1-bit, 4-bit, or 8-bit transfer mode specifications for MMC cards up to 52 MHz in both SDR
– One HS host with integrated High Speed Phy
– Two HS hosts with integrated HS-IC USB (High Speed Inter-Chip USB) Phy
operations. Uses x1 PHY configuration.
– Providing RS232 interface
– Supporting 9-bit RS485 multidrop mode
– One of the five UARTs (UART1) supports 8-wire while others four supports 4-wire. This is
:
mode (104 MB/s max)
and DDR modes (104 MB/s max)
due to the SoC IOMUX limitation, since all UART IPs are identical.
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i.MX 6Solo/6DualLite Applications Processors for Consumer Products, Rev. 1
C, supporting 400 kbps
1
Mbps
Freescale Semiconductor