MCIMX6S7CVM08AB Freescale Semiconductor, MCIMX6S7CVM08AB Datasheet - Page 9

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MCIMX6S7CVM08AB

Manufacturer Part Number
MCIMX6S7CVM08AB
Description
Processors - Application Specialized i.MX6 Solo rev 1.1
Manufacturer
Freescale Semiconductor
Type
Multimedia Applicationsr
Datasheet

Specifications of MCIMX6S7CVM08AB

Rohs
yes
Core
ARM Cortex A9
Processor Series
i.MX6
Data Bus Width
32 bit
Maximum Clock Frequency
800 MHz
Data Ram Size
128 KB
Maximum Operating Temperature
+ 105
Mounting Style
SMD/SMT
Package / Case
MAPBGA-624
Interface Type
I2C, I2S, UART, USB
Memory Type
L1/L2 Cache, ROM, SRAM
Minimum Operating Temperature
- 40 C
Number Of Timers
2

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Part Number:
MCIMX6S7CVM08AB
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The i.MX 6SoloLite processor contains a variety of digital and analog modules.
modules in alphabetical order.
Freescale Semiconductor
128x8 Fuse
Mnemonic
AUDMUX
Block
CTI-1
CTI-2
CTI-3
CTI-4
CTI-5
CCM
ARM
GPC
SRC
CSU
CTM
DCP
DAP
Box
Modules List
Digital Audio Mux
Power Controller,
Central Security
Module, Global
Electrical Fuse
Debug Access
ARM Platform
System Reset
Clock Control
Cross Trigger
Cross Trigger
co-processor
Block Name
Controller
Interfaces
Matrix
Array
Data
Unit
Port
i.MX 6SoloLite Applications Processors for Consumer Products, Rev. 1
Power Control
Debug / Trace Cross Trigger Interfaces allows cross-triggering based on inputs from masters
Debug / Trace Cross Trigger Matrix IP is used to route triggering events between CTIs. The
Subsystem
Resets, and
Peripherals
Peripherals
Multimedia
Security
Security
Security
System
Clocks,
Control
ARM
Table 2. i.MX 6SoloLite Modules List
Electrical Fuse Array. Enables to setup Boot Modes, Security Levels, Security
Keys, and many other system parameters.
The i.MX 6SoloLite processor consists of 2-128x8-bit fuse box accessible
through OCOTP_CTRL interface.
The ARM Cortex-A9 platform consists of a Cortex-A9 core version r2p10 and
associated sub-blocks, including Level 2 Cache Controller, SCU (Snoop
Control Unit), GIC (General Interrupt Controller), private timers, Watchdog,
and CoreSight debug modules.
The AUDMUX is a programmable interconnect for voice, audio, and
synchronous data routing between host serial interfaces (for example, SSI1,
SSI2, and SSI3) and peripheral serial interfaces (audio and voice codecs).
The AUDMUX has seven ports with identical functionality and programming
models. A desired connectivity is achieved by configuring two or more
AUDMUX ports.
These modules are responsible for clock and reset distribution in the system,
and also for the system power management.
The Central Security Unit (CSU) is responsible for setting comprehensive
security policy within the i.MX 6SoloLite platform. The Security Control
Registers (SCR) of the CSU are set during boot time by the HAB and are
locked to prevent further writing.
attached to CTIs. The CTI module is internal to the Cortex-A9 Core Platform.
CTM module is internal to the Cortex-A9 Core Platform.
The DAP provides real-time access for the debugger without halting the core
to:
The DAP also provides debugger access to JTAG scan chains. The DAP
module is internal to the Cortex-A9 Core Platform.
This module provides support for general encryption and hashing functions
typically used for security functions. Because its basic job is moving data
from memory to memory, it also incorporates a memory-copy (memcopy)
function for both debugging and as a more efficient method of copying data
between memory blocks than the DMA-based approach.
• System memory and peripheral registers
• All debug configuration registers
Brief Description
Table 2
describes these
Modules List
9

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