MCIMX6L3DVN10AA Freescale Semiconductor, MCIMX6L3DVN10AA Datasheet - Page 60

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MCIMX6L3DVN10AA

Manufacturer Part Number
MCIMX6L3DVN10AA
Description
Processors - Application Specialized i.MX6 Megrez
Manufacturer
Freescale Semiconductor
Type
Multimedia Applicationsr
Datasheet

Specifications of MCIMX6L3DVN10AA

Rohs
yes
Core
ARM Cortex A9
Processor Series
i.MX6
Data Bus Width
32 bit
Maximum Clock Frequency
1 GHz
Data Ram Size
128 KB
Maximum Operating Temperature
+ 95 C
Mounting Style
SMD/SMT
Package / Case
MAPBGA-432
Interface Type
I2C, I2S, UART, USB
Memory Type
L1/L2 Cache, ROM, SRAM
Minimum Operating Temperature
0 C
Number Of Timers
2
Electrical Characteristics
Figure 27
Table
1
2
3
4.10
The following subsections provide information on external peripheral interfaces.
4.10.1
The AUDMUX provides a programmable interconnect logic for voice, audio, and data routing between
internal serial interfaces (SSIs) and external serial interfaces (audio and voice codecs). The AC timing of
AUDMUX external pins is governed by the SSI module. For more information, see the respective SSI
electrical specifications found within this document.
60
To receive the reported setup and hold values, read calibration should be performed in order to locate the DQS in the middle
of DQ window.
All measurements are in reference to Vref level.
Measurements were done using balanced load and 25 Ω resistor from outputs to VDD_REF.
LP26
ID
44.
DQS (input)
DQ (input)
External Peripheral Interface Parameters
shows the LPDDR2 read timing diagram. The timing parameters for this diagram appear in
CK_B
AUDMUX Timing Parameters
CK
Minimum required DQ valid window width for LPDDR2
i.MX 6SoloLite Applications Processors for Consumer Products, Rev. 1
Parameter
DATA
Figure 27. LPDDR2 Read Cycle
Table 44. LPDDR2 Read Cycle
LP26
DATA
DATA
DATA
DATA
Symbol
DATA
Min
270
CK = 400 MHz
Freescale Semiconductor
DATA
Max
DATA
Unit
ps

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