MC10XS3535DHFKR2 Freescale Semiconductor, MC10XS3535DHFKR2 Datasheet - Page 29

• Manufacturer Part Number: MC10XS3535DHFKR2
• Description: Power Switch ICs - Power Distribution PENTA Output ESWITCH
• Manufacturer: Freescale Semiconductor

Specifications of MC10XS3535DHFKR2

• Rohs: yes
• Number Of Outputs: 5
• On Resistance (max): 55 mOhms
• Operating Supply Voltage: 3 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Package / Case: PQFN-24
• Minimum Operating Temperature: - 40 C
• Output Current: 250 mA

SERIAL INPUT COMMUNICATION
accomplished using 16-bit messages. A message is
transmitted by the master starting with the MSB, D15, and
ending with the LSB, D0. Each incoming command message
on the SI pin can be interpreted using the bit assignment
described in
address bits, are used to select the command register. Bit
D10 is the watchdog bit. The remaining 10 bits, D9 : D0, are
used to configure and control the output and its protection
features. Multiple messages can be transmitted in
succession to accommodate those applications where daisy
chaining is desirable or to confirm transmitted data as long as
the messages are all multiples of 16 bits. Any attempt made
to latch in a message that is not 16 bits will be ignored.
equal 0 or fail mode (Fail=1).
Config CSNS 0
Analog Integrated Circuit Device Data
Freescale Semiconductor
Initialization
SI Register
Config OL
Config SR
Prescaler
SPI communication compliant to 3.3 V and 5.0 V is
All SPI registers are reset (all bit equal 0) in case of
External
Note: testmode address used only by FSL is D[15:11]=01111 with RST pin voltage higher than 8V typ.
X = Don’t care and 0 = need to rewrite logic “0”
Control
Control
Control
Control
Control
Control
RESET
Switch
Config
OUT1
OUT2
OUT3
OUT4
OUT5
Table
D1
5
0
0
0
0
0
0
0
0
0
0
X
D1
SI Address
4
0
0
0
0
0
1
1
1
1
1
1
X
7. The 5 bits D15 : D11, called register
D1
X
3
0
0
0
0
0
0
0
0
1
1
1
D1
X
2
0
0
1
1
1
0
1
1
0
0
1
D1
X
1
0
1
0
0
1
1
0
1
0
1
0
Table 8. Serial Input Address and Configuration Bit Map
D10
WD
WD
WD
WD
WD
WD Phase2 Phase1
WD Phase2 Phase1
WD Phase2 Phase1
WD Phase2 Phase1
WD Phase2 Phase1
WD Phase2 Phase1
0
LEDControl5
LOGIC COMMANDS AND REGISTERS
CSNS
sync
D9
0
0
1
0
PR1
SR1
D8
0
0
0
0
RST
FOGen
ONoff
ONoff
ONoff
ONoff
ONoff
ONoff
PR2
SR2
D7
0
0
0
DEVICE REGISTER ADDRESSING
serial input registers on device operation are described in this
section.
PWM6
PWM6
PWM6
PWM6
PWM6
PWM6
Bit Sig
PWM
sync
PR3
SR3
MSB
LSB
D6
0
0
0

The register addresses (D15 : D11) and the impact of the
LEDControl1
Table 8
PWM5
PWM5
PWM5
PWM5
PWM5
PWM5
Xenon
SI Msg Bit
D15 : D11
D5
SI Data
Table 7. SI Message Bit Assignment
D9 : D0
0
0
0
0
D10
OLLED5 OLLED4 OLLED3 OLLED2 OLLED1
NO_OCHI5 NO_OCHI4 NO_OCHI3 NO_OCHI2 NO_OCHI1
summarizes the SI registers.
PWM4
PWM4
PWM4
PWM4
PWM4
PWM4
MUX2
D4
0
0
0
Register address bits.
Watchdog in: toggled to satisfy watchdog
requirements.
Used to configure inputs, outputs, device
protection features, and SO status content.
LOGIC COMMANDS AND REGISTERS
PWM3
PWM3
PWM3
PWM3
PWM3
PWM3
MUX1
FUNCTIONAL DEVICE OPERATION
D3
0
0
0
Message Bit Description
PWM2
PWM2
PWM2
PWM2
PWM2
PWM2
MUX0
PR4
SR4
D2
0
PWM1
PWM1
PWM1
PWM1
PWM1
PWM1
SOA1
PR5
SR5
D1
0
MC10XS3535
PWM0
PWM0
PWM0
PWM0
PWM0
PWM0
SOA0
PR6
D0
0
0
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