SI3482-A01-GMR Silicon Labs, SI3482-A01-GMR Datasheet - Page 5

• Manufacturer Part Number: SI3482-A01-GMR
• Description: Power Switch ICs - POE / LAN 12/24/48-port Power Manager
• Manufacturer: Silicon Labs

Specifications of SI3482-A01-GMR

• Rohs: yes

Table 4. Timing Requirements
Description
SPI Timing Requirements (See Figure 1)
T
T
T
T
T
T
T
T
T
F
UART Requirements (See Figure 2)
ΔFTx
ΔFRx
SPACE
SE
SD
SEZ
SDZ
CKH
CKL
SIS
SIH
SCH
MAX
MARK
BIT TIMES
BIT SAMPLING
MOSI
MISO
NSS
SCK
T
SEZ
START
BIT
NSS Falling to First SCK Edge
Last SCK Edge to NSS Rising
NSS Falling to MISO Valid
NSS Rising to MISO High Z
SCK High Time
SCK Low Time
MOSI Valid to SCK Sample Edge
SCK Sample Edge to MOSI Change
SCK Shift Edge to MISO Change
Maximum SPI Clock Speed
Deviation of Tx Transmit Speed from Pin-programmed
Value.
Deviation of Rx receive Speed from Pin-programmed
Value.
T
SE
MSB
MSB
D0
T
SIS
Bit 6
Bit 6
T
SIH
D1
Figure 2. UART Timing Diagram
Test Conditions
Figure 1. SPI Timing Diagram
Bit 5
Bit 5
T
CKH
D2
T
SCH
Bit 4
Bit 4
Rev. 0.1
D3
T
CKL
Bit 3
Bit 3
D4
Bit 2
Bit 2
D5
Bit 1
Bit 1
Min
210
210
84
84
84
–3
–4
—
—
84
—
—
T
SD
D6
Bit 0
Bit 0
T
SDZ
Max
168
168
168
D7
+3
+4
—
—
—
—
—
—
1
Si3482
STOP
BIT
Units
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
%
%
5