E520.03A62AC ELMOS Semiconductor, E520.03A62AC Datasheet - Page 14

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E520.03A62AC

Manufacturer Part Number
E520.03A62AC
Description
Motor / Motion / Ignition Controllers & Drivers 8x low side driver
Manufacturer
ELMOS Semiconductor
Type
Unipolar Stepper Motor Driverr
Datasheet

Specifications of E520.03A62AC

Rohs
yes
Product
Stepper Motor Controllers / Drivers
Operating Supply Voltage
3.3 V, 5 V
Supply Current
5 mA
Operating Temperature
- 40 C to + 125 C
Mounting Style
SMD/SMT
Package / Case
QFN-20
Number Of Outputs
8
Output Current
300 mA
Output Voltage
3 V to 25 V
Power Dissipation
2.8 W
SPI registers
The following diagram summarises the SPI address and control bits assignments.
Table 1. SPI Register and Control Bit Table
All other addresses are reserved. Write access to any of the reserved addresses will not have any effect, read access
will return 0
D08-D11 of writable registers to there POR- value (Reset-value). This values can be found in Table 1.
Bits regarding the driver outputs:
OUTx - Output driver latch
0
1
STATx - Output driver status
0
1
RHEx - Relay hold mode enable bit
0
state only depends on OUTx
1
PWM frequency fixed to 25kHz, duty cycle adapted to
V
This document contains information on a pre-production product. ELMOS Semiconductor AG reserves the right to change specifications and information herein without notice.
b
b
b
b
b
b
BATsense
PWM duty cycles
Stall detection
12 / 8 ChANNeL LOw SIDe DRIveR wITh STALL DeTeCTION
PRODUCTION DATA - JUL 24, 2012
PWM duty cycle
ELMOS Semiconductor AG
Output status
Configuration
configuration
corresponds to an active low side driver
corresponds to an inactive low side driver
corresponds to a low output status
corresponds to a high output status
disables V
enables V
Overcurrent
status and
PWM enable
Relay hold
LS driver
Pulldown
control
status
enable
enable
Mode
and
voltage level
b
BATsense
BATsense
. For IC versions only having 8-channels (E520.03 and E520.08) it´s recommended to programm the bits
R/W
adapted PWM mode if OUTx = 0
POR
POR
POR
POR
POR
POR
POR
POR
POR
adapted PWM mode → output
W
R
W
R
W
R
W
R
W
R
W
R
W
R
W
R
W
R
ADR3
SUP
SUP
SUP
SUP
SUP
SUP
SUP
SUP
SUP
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
b
b
b
b
b
b
b
b
b
b
b
b
b
b
b
b
b
b
ADR2
OVT
OVT
OVT
OVT
OVT
OVT
OVT
OVT
OVT
0
0
0
0
0
0
0
0
1
0
1
0
1
0
1
0
0
0
b
b
b
b
b
b
b
b
b
b
b
b
b
b
b
b
b
b
ADR1
ATT
ATT
ATT
ATT
ATT
ATT
ATT
ATT
ATT
0
0
0
0
1
0
1
0
0
0
0
0
1
0
1
0
0
0
b
b
b
b
b
b
b
b
b
b
b
b
b
b
b
b
b
b
ADR0
OC
OC
OC
OC
OC
OC
OC
OC
OC
0
0
1
0
0
0
1
0
0
0
1
0
0
0
1
0
0
0
b
b
b
b
b
b
b
b
b
b
b
b
b
b
b
b
b
b
STAT11 STAT10 STAT9 STAT8 STAT7 STAT6 STAT5 STAT4 STAT3 STAT2 STAT1 STAT0
STAT11 STAT10 STAT9 STAT8 STAT7 STAT6 STAT5 STAT4 STAT3 STAT2 STAT1 STAT0
OUT11 OUT10
OCE11 OCE10
PWE11 PWE10
PWE11 PWE10
RHE11 RHE10
RHE11 RHE10
PDE11 PDE10
PDE11 PDE10
STOP2
STOP2
D11
res.
res.
SDS2
SDS2
res.
res.
1
1
0
0
0
1
1
0
0
b
b
b
b
b
b
b
b
b
b
PWMC4 PWMC3 PWMC2 PWMC1 PWMC0
PWMC4 PWMC3 PWMC2 PWMC1 PWMC0
Data Sheet
D10
res.
res.
SDS1
SDS1
res.
FSW2
14/29
1
1
0
0
0
1
0
0
1
b
b
b
b
b
b
b
b
b
D09
OUT9
res.
res.
OCE9
PWE9
PWE9
RHE9
RHE9
PDE9
PDE9
SDS0
SDS0
res.
STE2
PWEx - Constant PWM mode enable bit
0
depends on OUTx
1
PDEx - Enable bit for output pull-down current sources
0
1
CLMP[1:0] - Output clamping
X0
01
11
1
1
0
0
0
1
0
0
0
b
b
b
b
b
b
b
b
b
b
b
b
b
disables Constant PWM mode → output state only
enables Constant PWM mode if OUTx = 0
pull down current switched off
pull down current switched on
b
b
b
corresponds to V
refer to chapter output clamping (see Table 2)
corresponds to >37V absolute clamping,
CLMP1
CLMP1
OUT8
res.
res.
OCE8
PWE8
PWE8
RHE8
RHE8
PDE8
PDE8
res.
STW2
D08 D07
1
1
0
0
0
1
1
0
0
b
b
b
b
b
b
b
b
b
CLMP0
CLMP0
STOP1
STOP1
OUT7
res.
res.
OCE7
PWE7
PWE7
RHE7
RHE7
PDE7
PDE7
1
1
0
0
0
1
1
0
0
b
b
b
b
b
b
b
b
b
D06
OUT6
res.
res.
OCE6
PWE6
PWE6
RHE6
RHE6
PDE6
PDE6
res.
FSW1
OCC
OCC
1
1
0
0
0
1
0
0
1
b
b
b
b
b
b
b
b
b
BATsense
D05
OUT5
res.
res.
OCE5
PWE5
PWE5
RHE5
RHE5
PDE5
PDE5
res.
res.
res.
STE1
LOG
LOG
1
1
0
0
0
1
0
0
0
b
b
b
b
b
b
b
b
b
e520.01/02/03/08
related clamping
PWMA4 PWMA3 PWMA2 PWMA1 PWMA0
PWMA4 PWMA3 PWMA2 PWMA1 PWMA0
PWMB4 PWMB3 PWMB2 PWMB1 PWMB0
PWMB4 PWMB3 PWMB2 PWMB1 PWMB0
D04
OUT4
res.
res.
OCE4
PWE4
PWE4
RHE4
RHE4
PDE4
PDE4
res.
STW1
1
1
0
0
0
1
0
0
0
b
b
b
b
b
b
b
b
b
QM-No.: 25DS0054E.02
STOP0
STOP0
OUT3
res.
res.
OCE3
PWE3
PWE3
RHE3
RHE3
PDE3
PDE3
D03 D02
1
1
0
0
0
1
0
0
0
b
b
b
b
b
b
b
b
b
OUT2
res.
res.
OCE2
PWE2
PWE2
RHE2
RHE2
PDE2
PDE2
res.
FSW0
1
1
0
0
0
1
0
0
1
b
b
b
b
b
b
b
b
b
b
D01
OUT1
res.
res.
OCE1
PWE1
PWE1
RHE1
RHE1
PDE1
PDE1
res.
STE0
1
1
0
0
0
1
0
0
0
b
b
b
b
b
b
b
b
b
D00
OUT0
res.
res.
OCE0
PWE0
PWE0
RHE0
RHE0
PDE0
PDE0
res.
STW0
1
1
0
0
0
1
0
0
0
b
b
b
b
b
b
b
b
b

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