E981.18A39FB ELMOS Semiconductor, E981.18A39FB Datasheet - Page 27

• Manufacturer Part Number: E981.18A39FB
• Description: Motor / Motion / Ignition Controllers & Drivers 8ch squib driver
• Manufacturer: ELMOS Semiconductor
• Type: Airbag Squib Driverr

Specifications of E981.18A39FB

• Rohs: yes
• Product: Electromechanical Drivers
• Operating Supply Voltage: 5 V
• Supply Current: 4.3 mA
• Operating Temperature: - 40 C to + 95 C
• Mounting Style: SMD/SMT
• Package / Case: QFN-44
• Number Of Outputs: 8
• Power Dissipation: 3.2 W

8-Channel Airbag Squib Driver
PRELIMINARY INFORMATION - AUG 01, 2011
The FTL RESET can be done by:
–
–
–
–
–
The FTL is started by:
–
–
After reaching the counter end value (00), the FTL output is switched to logic high level and remains
there until a FTL RESET is explicitly triggered. The counter is not re-started if additional TxU_on CMD's
are sent.
For test purpose, all 8 FTL outputs are summarized in a “OR” and an “AND” combination. These two
logical outputs can be switched to the AMX output by the S1 Multiplexer (see 5.10). There are two
methods to check the FTL-timer in application:
•
•
The FTL_OR and FTL_AND output scheme is given in Fig. 14 below:
This document contains information on a pre-production product. ELMOS Semiconductor AG reserves the right to change specifications and information herein without notice.
ELMOS Semiconductor AG
CODELOCK Reset pulse (0x70 or 0x71, see chapter 5.3) or
SPI Reset pulse (0x4B, see chapter 5.3) or
SPI TxU_off CMD or
Global power on reset pulse (see chapter 5.3) or
SPI FTL_RESET CMD (0xE7,no driver have to be activated here. CMD is rejected during
“UNLOCK”-state)
SPI TxU_on CMD :
The counter starts by the run_FTL signal, which is activated with the according HSD_ON CMD from
the SPI decoder. The counter activation is independent from an active or not active state of ARM or
UNLOCK. It is only started by the HSD driver activation CMD in normal deployment mode or in Test-
Up Mode
SPI FTL_ACTIVATE CMD (0xE5) for test purpose without a driver activation.
(CMD is rejected during “UNLOCK”-state)
in TEST_UP-MODE by activating each HSD individually with reduced I
output switching from logical low to high level. For a single transistor activation the FTL_OR output
has to be selected. Whereas for a parallel activation of all 8 HSD (two CMD's needed here) the
FTL_AND combination can be selected to determine the longest FTL-Counter value.
in FTL_TEST modes (0xE5). Here all 8 FTL's are activated at the same time. Observing the AMX
transition from logical low to high level exhibits the maximum (FTL_AND) or the minimum (FTL_OR)
Counter time. In this mode no driver activation is necessary.
Fig. 13 FTL state transition
Page 27 of 63
Data Sheet
LIM
and observe the AMX
QM-No.: 25DS0072E.00
E981.18