LED7708 STMicroelectronics, LED7708 Datasheet - Page 33

• Manufacturer Part Number: LED7708
• Description: LED Lighting Drivers 16 Ch 85mA LED 3.6 to 36V 250kHz
• Manufacturer: STMicroelectronics

Specifications of LED7708

• Rohs: yes

LED7708
8.5.5
8.5.6
Normally, the serial data coming from the DIN pin is clocked out at the DOUT pin. Optionally,
the LED7708 can continuously transmit the status of the control registers when the
continuous status reading (CSRD) bit of the DEVCFG0 register is asserted. In this case the
device replaces (with a 16-clock-cycle delay) the received brightness data stored in the
FIFO with the CHSTA, CHSEL, LATENCY, DEVCFG0 and DEVCFG1 content. This option is
useful to get the device status without interrupting the brightness data flow.
The continuous status reading is available only with 1x256-bit and 1x192-bit data formats.
See
Brightness registers (BRTxx)
The BRT16:01 registers are 16-bit wide, write-only registers where the brightness levels,
received through the serial interface, are stored. These registers may be 12 or 16 bits wide,
depending on the BRLS and BDFS bits of the DEVCFG1, see
supports two brightness control options: group dimming and grayscale dimming.
The first option uses BRT01 only to set the desired brightness to all the channels, while the
second one allows independent brightness level on each channel (all BRTxx registers are
used). Group dimming and grayscale dimming modes are selected through the GSME bit of
the DEVCFG0 register.
The PWM signals at the outputs are generated by comparing the content of the BRT16:01
registers to a 16-bit or 12-bit counter, according to BRLS and BDFS bit status. The clock
source for the counter can be either external or internal, depending on the FOSC pin status.
See
All the brightness registers are not directly connected to the digital comparators of the
grayscale circuitry: a 256-bit buffer is used to store the value. The content of the buffer is
transferred to the brightness registers at the end of the LE pulse (falling edge) or at the end
of the current dimming cycle according to the selected option (See the DASS bit of the
DEVCFG1 register for details).
DEVCFG0 register
Table 14.
OVFW
EDMI
OTAF
DEN
Bit
Section 8.8.2
Section 8.6.1: Internal dimming oscillator
Position
DEVCFG0 register
0
1
2
3
for details.
Read only
Read only
Read only
Attribute
R/W
Doc ID 022698 Rev 1
Default
0
1
0
0
for details.
Device enable
0= device off
1= device on
Error detection mode indicator
0= valid data on CHSTA
1= error detection in progress or output voltage
not optimized
Regulation DAC overflow
0= regulation DAC in range
1= regulation DAC overflow
Overtemperature alert flag
0= die temp <120 °C
1= die temp >130 °C
Recommended operating conditions
Table
Description
15. The LED7708
33/53