74LVC2G00DP-G NXP Semiconductors, 74LVC2G00DP-G Datasheet - Page 4
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74LVC2G00DP-G
Manufacturer Part Number
74LVC2G00DP-G
Description
Logic Gates 3.3V DUAL 2-INPUT NAND GATE
Manufacturer
NXP Semiconductors
Datasheet
1.74LVC2G00GS115.pdf
(20 pages)
Specifications of 74LVC2G00DP-G
Product Category
Logic Gates
Rohs
yes
Product
NAND
Logic Family
LVC
Number Of Gates
2
Number Of Lines (input / Output)
2 / 1
High Level Output Current
- 32 mA
Low Level Output Current
32 mA
Propagation Delay Time
2.2 ns
Supply Voltage - Max
5.5 V
Supply Voltage - Min
1.65 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
SOT-505
Minimum Operating Temperature
- 40 C
Number Of Input Lines
2
Number Of Output Lines
1
Factory Pack Quantity
3000
Part # Aliases
74LVC2G00DP,125
NXP Semiconductors
Table 3.
7. Functional description
Table 4.
[1]
8. Limiting values
Table 5.
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
[1]
[2]
[3]
74LVC2G00
Product data sheet
Symbol
1A, 2A
1B, 2B
GND
1Y, 2Y
V
Input
nA
L
L
H
H
Symbol
V
V
V
I
I
I
I
I
T
P
IK
OK
O
CC
GND
stg
CC
CC
I
O
tot
H = HIGH voltage level; L = LOW voltage level.
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
When V
For TSSOP8 package: above 55 °C the value of P
For VSSOP8 package: above 110 °C the value of P
For XSON8, XSON8U and XQFN8 packages: above 118 °C the value of P
CC
Pin description
Function table
Limiting values
Parameter
supply voltage
input voltage
output voltage
input clamping current
output clamping current
output current
supply current
ground current
storage temperature
total power dissipation
= 0 V (Power-down mode), the output voltage can be 5.5 V in normal operation.
Pin
SOT505-2, SOT765-1, SOT833-1, SOT1089,
SOT996-2, SOT1116 and SOT1203
1, 5
2, 6
4
7, 3
8
6.2 Pin description
[1]
nB
L
H
L
H
All information provided in this document is subject to legal disclaimers.
Conditions
Active mode
Power-down mode
V
V
V
T
amb
I
O
O
< 0 V
tot
< 0 V or V
= 0 V to V
tot
Rev. 11 — 22 June 2012
= −40 °C to +125 °C
derates linearly with 2.5 mW/K.
derates linearly with 8 mW/K.
CC
O
> V
CC
SOT902-2
7, 3
6, 2
4
1, 5
8
tot
derates linearly with 7.8 mW/K.
[1][2]
Output
nY
H
H
H
L
[1]
[1]
[3]
Min
−0.5
−0.5
−0.5
−0.5
−50
-
-
-
−100
−65
-
Description
data input
data input
ground (0 V)
data output
supply voltage
Dual 2-input NAND gate
74LVC2G00
Max
+6.5
+6.5
V
+6.5
-
±50
±50
100
-
+150
300
CC
© NXP B.V. 2012. All rights reserved.
+ 0.5
Unit
V
V
V
V
mA
mA
mA
mA
mA
°C
mW
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