74LVC2G00DP-G NXP Semiconductors, 74LVC2G00DP-G Datasheet - Page 3

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74LVC2G00DP-G

Manufacturer Part Number
74LVC2G00DP-G
Description
Logic Gates 3.3V DUAL 2-INPUT NAND GATE
Manufacturer
NXP Semiconductors
Datasheet

Specifications of 74LVC2G00DP-G

Product Category
Logic Gates
Rohs
yes
Product
NAND
Logic Family
LVC
Number Of Gates
2
Number Of Lines (input / Output)
2 / 1
High Level Output Current
- 32 mA
Low Level Output Current
32 mA
Propagation Delay Time
2.2 ns
Supply Voltage - Max
5.5 V
Supply Voltage - Min
1.65 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
SOT-505
Minimum Operating Temperature
- 40 C
Number Of Input Lines
2
Number Of Output Lines
1
Factory Pack Quantity
3000
Part # Aliases
74LVC2G00DP,125
NXP Semiconductors
5. Functional diagram
6. Pinning information
74LVC2G00
Product data sheet
Fig 1.
Fig 4.
Fig 6.
Logic symbol
Pin configuration SOT505-2 and SOT765-1
Pin configuration SOT996-2
GND
1A
1B
2Y
1A
1B
2A
2B
GND
1A
1B
2Y
1
2
3
4
6.1 Pinning
001aah748
1
2
3
4
Transparent top view
1Y
2Y
74LVC2G00
74LVC2G00
001aab736
8
7
6
5
001aai251
All information provided in this document is subject to legal disclaimers.
Fig 2.
8
7
6
5
V
1Y
2B
2A
CC
V
1Y
2B
2A
CC
Rev. 11 — 22 June 2012
IEC logic symbol
001aah749
&
&
Fig 5.
Fig 7.
Pin configuration SOT833-1, SOT1089,
SOT1116 and SOT1203
Pin configuration SOT902-2
terminal 1
index area
1Y
2B
2A
GND
1A
1B
2Y
Fig 3.
Transparent top view
1
2
3
B
A
74LVC2G00
Transparent top view
1
2
3
4
74LVC2G00
Logic diagram (one gate)
Dual 2-input NAND gate
001aab737
74LVC2G00
8
7
6
5
V
1Y
2B
2A
CC
© NXP B.V. 2012. All rights reserved.
7
6
5
001aae980
1A
1B
2Y
mna099
3 of 20
Y

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