74AUP1G240GM-G NXP Semiconductors, 74AUP1G240GM-G Datasheet - Page 13

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74AUP1G240GM-G

Manufacturer Part Number
74AUP1G240GM-G
Description
Buffers & Line Drivers 3V SINGLE BUF/LD INV 3S
Manufacturer
NXP Semiconductors
Datasheet

Specifications of 74AUP1G240GM-G

Product Category
Buffers & Line Drivers
Rohs
yes
Number Of Input Lines
1
Number Of Output Lines
1
Polarity
Inverting
Supply Voltage - Max
3.6 V
Supply Voltage - Min
0.8 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
XSON-6
High Level Output Current
- 4 mA
Logic Family
AUP
Logic Type
CMOS
Low Level Output Current
4 mA
Minimum Operating Temperature
- 40 C
Number Of Channels Per Chip
1
Output Type
3-State
Propagation Delay Time
21.6 ns at 1.1 V to 1.3 V, 12.3 ns at 1.4 V to 1.6 V, 9.5 ns at 1.65 V to 1.95 V, 7.1 ns at 2.3 V to 2.7 V, 6.4 ns at 3 V to 3.6 V
Factory Pack Quantity
5000
Part # Aliases
74AUP1G240GM,115
NXP Semiconductors
Table 11.
[1]
74AUP1G240
Product data sheet
Supply voltage
V
0.8 V to 3.6 V
Fig 10. Test circuit for measuring switching times
CC
For measuring enable and disable times R
Test data is given in
C
R
V
Definitions for test circuit:
R
L
L
T
EXT
Test data
= Load resistance.
= Load capacitance including jig and probe capacitance.
= Termination resistance should be equal to the output impedance Z
= External voltage for measuring switching times.
Load
C
5 pF, 10 pF, 15 pF and 30 pF
L
Table
11.
L
All information provided in this document is subject to legal disclaimers.
G
= 5 k, for measuring propagation delays, setup and hold times and pulse width R
V I
Rev. 4 — 29 June 2012
R
5 k or 1 M
R T
L
[1]
DUT
V
CC
V O
Low-power inverting buffer/line driver; 3-state
V
t
open
C L
o
PLH
001aac521
EXT
of the pulse generator.
V
EXT
, t
5 kΩ
R L
PHL
t
GND
PZH
74AUP1G240
, t
PHZ
© NXP B.V. 2012. All rights reserved.
t
2  V
PZL
, t
CC
PLZ
L
13 of 23
= 1 M.

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