89H48H12G3YCHLG IDT, 89H48H12G3YCHLG Datasheet - Page 5
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89H48H12G3YCHLG
Manufacturer Part Number
89H48H12G3YCHLG
Description
Peripheral Drivers & Components - PCIs
Manufacturer
IDT
Datasheet
1.89H48H12G2ZCBLGI.pdf
(44 pages)
Specifications of 89H48H12G3YCHLG
Rohs
yes
IDT 89HPES48H12G2 Data Sheet
PE00RP[3:0]
PE00RN[3:0]
PE00TN[3:0]
PE01RP[3:0]
PE01RN[3:0]
PE01TN[3:0]
PE02RP[3:0]
PE02RN[3:0]
PE02TN[3:0]
PE03RP[3:0]
PE03RN[3:0]
PE03TN[3:0]
PE04RP[3:0]
PE04RN[3:0]
PE04TN[3:0]
PE05RP[3:0]
PE05RN[3:0]
PE05TN[3:0]
PE06RP[3:0]
PE06RN[3:0]
PE06TN[3:0]
PE07RP[3:0]
PE07RN[3:0]
PE07TN[3:0]
PE08RP[3:0]
PE08RN[3:0]
PE08TN[3:0]
PE00TP[3:0]
PE01TP[3:0]
PE02TP[3:0]
PE03TP[3:0]
PE04TP[3:0]
PE05TP[3:0]
PE06TP[3:0]
PE07TP[3:0]
PE08TP[3:0]
Signal
Type
O
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
Table 1 PCI Express Interface Pins (Part 1 of 2)
PCI Express Port 0 Serial Data Receive. Differential PCI Express receive
pairs for port 0.
PCI Express Port 0 Serial Data Transmit. Differential PCI Express trans-
mit pairs for port 0.
PCI Express Port 1 Serial Data Receive. Differential PCI Express receive
pairs for port 1. When port 0 is merged with port 1, these signals become
port 0 receive pairs for lanes 4 through 7.
PCI Express Port 1 Serial Data Transmit. Differential PCI Express trans-
mit pairs for port 1. When port 0 is merged with port 1, these signals
become port 0 transmit pairs for lanes 4 through 7.
PCI Express Port 2 Serial Data Receive. Differential PCI Express receive
pairs for port 2.
PCI Express Port 2 Serial Data Transmit. Differential PCI Express trans-
mit pairs for port 2.
PCI Express Port 3 Serial Data Receive. Differential PCI Express receive
pairs for port 3. When port 2 is merged with port 3, these signals become
port 2 receive pairs for lanes 4 through 7.
PCI Express Port 3 Serial Data Transmit. Differential PCI Express trans-
mit pairs for port 3. When port 2 is merged with port 3, these signals
become port 2 transmit pairs for lanes 4 through 7.
PCI Express Port 4 Serial Data Receive. Differential PCI Express receive
pairs for port 4.
PCI Express Port 4 Serial Data Transmit. Differential PCI Express trans-
mit pairs for port 4.
PCI Express Port 5 Serial Data Receive. Differential PCI Express receive
pairs for port 5. When port 4 is merged with port 5, these signals become
port 4 receive pairs for lanes 4 through 7.
PCI Express Port 5 Serial Data Transmit. Differential PCI Express trans-
mit pairs for port 5. When port 4 is merged with port 5, these signals
become port 4 transmit pairs for lanes 4 through 7.
PCI Express Port 6 Serial Data Receive. Differential PCI Express receive
pairs for port 6.
PCI Express Port 6 Serial Data Transmit. Differential PCI Express trans-
mit pairs for port 6.
PCI Express Port 7 Serial Data Receive. Differential PCI Express receive
pairs for port 7. When port 6 is merged with port 7, these signals become
port 6 receive pairs for lanes 4 through 7.
PCI Express Port 7 Serial Data Transmit. Differential PCI Express trans-
mit pairs for port 7. When port 6 is merged with port 7, these signals
become port 6 transmit pairs for lanes 4 through 7.
PCI Express Port 8 Serial Data Receive. Differential PCI Express receive
pairs for port 8.
PCI Express Port 8 Serial Data Transmit. Differential PCI Express trans-
mit pairs for port 8.
5 of 44
Name/Description
November 28, 2011