72V291L15PF IDT, 72V291L15PF Datasheet - Page 21

• Manufacturer Part Number: 72V291L15PF
• Description: FIFO
• Manufacturer: IDT

Specifications of 72V291L15PF

• Part # Aliases: IDT72V291L15PF

NOTE:
1. X = 15 for the IDT72V281 and X = 16 for the IDT72V291.
NOTES:
1. Retransmit setup is complete after OR returns LOW.
2. No more than D - 2 words may be written to the FIFO between Reset (Master or Partial) and Retransmit setup. Therefore, IR will be LOW throughout the Retransmit setup procedure.
3. OE = LOW
4. W
5. OR goes LOW at 60ns + 2 RCLK cycles + t
Q
WCLK
IDT72V281/72V291 3.3V CMOS SUPERSYNC FIFO
65,536 x 9 and 131,072 x 9
WCLK
RCLK
0
D = 65,537 for the IDT72V281 and 131,073 for the IDT72V291.
SEN
WEN
REN
- Q
PAE
PAF
LD
1
OR
SI
, W
RT
HF
n
2
, W
t
ENS
3
= first, second and third words written to the FIFO after Master Reset.
W
x
Figure 13. Serial Loading of Programmable Flag Registers (IDT Standard and FWFT Modes)
t
ENH
BIT 0
t
t
LDS
t
ENS
DS
t
ENS
t
RTS
t
RTS
REF
.
t
t
ENH
LDH
EMPTY OFFSET
t
t
REF
t
ENH
HF
t
SKEW2
1
Figure 12. Retransmit Timing (FWFT Mode)
TM
2
t
PAF
1
W
x+1
BIT X
21
(1)
BIT 0
2
t
PAE
FULL OFFSET
3
t
A
COMMERCIAL AND INDUSTRIAL
t
t
ENH
REF
(5)
W
1
TEMPERATURE RANGES
(4)
t
t
BIT X
LDH
ENH
t
DH
(1)
W
4
2
t
A
4513 drw 16
t
ENH
4513 drw 15
W
3