72V2105L10PF IDT, 72V2105L10PF Datasheet - Page 20
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72V2105L10PF
Manufacturer Part Number
72V2105L10PF
Description
FIFO 256Kx18 3.3V SUPERSYNC FIFO
Manufacturer
IDT
Datasheet
1.72V295L10PFG.pdf
(26 pages)
Specifications of 72V2105L10PF
Part # Aliases
IDT72V2105L10PF
NOTES:
1. Retransmit setup is complete after EF returns HIGH, only then can a read operation begin.
2. OE = LOW.
3. W
4. No more than D - 2 may be written to the FIFO between Reset (Master or Partial) and Retransmit setup. Therefore, FF will be HIGH throughout the Retransmit setup procedure.
5. There must be at least two words written to the FIFO before a Retransmit operation can be invoked.
Q
IDT72V295/72V2105 3.3V HIGH DENSITY CMOS
SUPERSYNC FIFO
WCLK
D = 131,072 for IDT72V295 and 262,144 for IDT72V2105.
RCLK
0
WEN
1
REN
- Q
PAE
PAF
= first word written to the FIFO after Master Reset, W
HF
EF
RT
n
t
ENS
W
TM
x
131,072 x 18, 262,144 x 18
t
t
A
ENH
t
ENS
t
RTS
t
RTS
Figure 11. Retransmit Timing (IDT Standard Mode)
2
= second word written to the FIFO after Master Reset.
t
t
t
ENH
t
REF
HF
SKEW2
1
W
x+1
20
2
t
PAF
1
t
REF
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
t
ENS
2
t
t
A
PAE
W
1
(3)
4668 drw 14
t
t
A
ENH
W
2
(3)