74LVC08APW-Q100,11 NXP Semiconductors, 74LVC08APW-Q100,11 Datasheet - Page 7

• Manufacturer Part Number: 74LVC08APW-Q100,11
• Description: Logic Gates
• Manufacturer: NXP Semiconductors

Specifications of 74LVC08APW-Q100,11

• Rohs: yes
• Product: AND
• Logic Family: 74LVC
• Number Of Gates: 4
• Number Of Lines (input / Output): 2 /
• Propagation Delay Time: 10.4 ns
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 1.2 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Package / Case: TSSOP-14
• Maximum Power Dissipation: 500 mW
• Minimum Operating Temperature: - 40 C
• Number Of Input Lines: 2
• Operating Temperature Range: - 40 C to + 125 C
• Output Current: 50 mA
• Power Dissipation: 500 mW

NXP Semiconductors
Table 8.
74LVC08A_Q100
Product data sheet
Supply voltage
1.2 V
1.65 V to 1.95 V
2.3 V to 2.7 V
2.7 V
3.0 V to 3.6 V
Fig 7.
Test data is given in
R
C
R
Test circuit for measuring switching times
L
L
T
Test data
= Load resistance
= Load capacitance including jig and probe capacitance
= Termination resistance should be equal to output impedance Z
Table
8. Definitions for test circuit:
negative
positive
pulse
pulse
Input
V
V
V
V
2.7 V
2.7 V
GENERATOR
0 V
0 V
I
CC
CC
CC
V
V
PULSE
I
I
All information provided in this document is subject to legal disclaimers.
90 %
10 %
t
t
r
Rev. 1 — 31 July 2012
f
V
V
V
M
M
I
10 %
90 %
R T
t
 2 ns
 2 ns
 2 ns
 2.5 ns
 2.5 ns
r
, t
V
DUT
f
t
t
CC
W
W
o
V
of the pulse generator
O
V
V
M
M
t
t
r
f
C L
001aaf615
Load
C
30 pF
30 pF
30 pF
50 pF
50 pF
L
R L
74LVC08A-Q100
Quad 2-input AND gate
© NXP B.V. 2012. All rights reserved.
R
1 k
1 k
500 
500 
500 
L
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