74LVC08APW-Q100,11 NXP Semiconductors, 74LVC08APW-Q100,11 Datasheet - Page 11

• Manufacturer Part Number: 74LVC08APW-Q100,11
• Description: Logic Gates
• Manufacturer: NXP Semiconductors

Specifications of 74LVC08APW-Q100,11

• Rohs: yes
• Product: AND
• Logic Family: 74LVC
• Number Of Gates: 4
• Number Of Lines (input / Output): 2 /
• Propagation Delay Time: 10.4 ns
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 1.2 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Package / Case: TSSOP-14
• Maximum Power Dissipation: 500 mW
• Minimum Operating Temperature: - 40 C
• Number Of Input Lines: 2
• Operating Temperature Range: - 40 C to + 125 C
• Output Current: 50 mA
• Power Dissipation: 500 mW

NXP Semiconductors
13. Abbreviations
Table 9.
14. Revision history
Table 10.
74LVC08A_Q100
Product data sheet
Acronym
CDM
DUT
ESD
HBM
MM
TTL
MIL
Document ID
74LVC08A_Q100 v.1
Abbreviations
Revision history
Description
Charged Device Model
Device Under Test
ElectroStatic Discharge
Human Body Model
Machine Model
Transistor-Transistor Logic
Military
20120731
Release date
All information provided in this document is subject to legal disclaimers.
Data sheet status
Product data sheet
Rev. 1 — 31 July 2012
Change notice
-
74LVC08A-Q100
Quad 2-input AND gate
Supersedes
-
© NXP B.V. 2012. All rights reserved.
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