74HC132D-Q100,118 NXP Semiconductors, 74HC132D-Q100,118 Datasheet - Page 10

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74HC132D-Q100,118

Manufacturer Part Number
74HC132D-Q100,118
Description
Logic Gates
Manufacturer
NXP Semiconductors
Datasheet

Specifications of 74HC132D-Q100,118

Rohs
yes
Product
NAND
Logic Family
74HC
Number Of Gates
4
Number Of Lines (input / Output)
2 /
Propagation Delay Time
190 ns
Supply Voltage - Max
6 V
Supply Voltage - Min
2 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
SO-14
Maximum Power Dissipation
500 mW
Minimum Operating Temperature
- 40 C
Number Of Input Lines
2
Operating Temperature Range
- 40 C to + 125 C
Output Current
25 mA
Power Dissipation
500 mW
NXP Semiconductors
15. Application information
74HC_HCT132_Q100
Product data sheet
Fig 10. Typical 74HCT132-Q100 transfer characteristics
P$
,
&&
a. V







CC
= 4.5 V

The slow input rise and fall times cause additional power dissipation, this can be
calculated using the following formula:
P
Average I
and
An example of a relaxation circuit using the 74HC132-Q100; 74HCT132-Q100 is shown
in

add
P
f
t
t
I
Figure
i
r
f
add
= input frequency (MHz);
= fall time (ns); 90 % to 10 %;
= rise time (ns); 10 % to 90 %;
CC(AV)
Figure
= f
= additional power dissipation (W);
i

 (t
13.
= average additional supply current (A).
CC(AV)
12.
r
 I
All information provided in this document is subject to legal disclaimers.

DDD
CC(AV)
differs with positive or negative input transitions, as shown in
9
,1
9
74HC132-Q100; 74HCT132-Q100
Rev. 2 — 13 August 2012

+ t
f
 I
CC(AV)
)  V
P$
,
&&
b. V






CC


CC
where:
= 5.5 V

Quad 2-input NAND Schmitt trigger



© NXP B.V. 2012. All rights reserved.
DDD

9
,1
9
Figure 11

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