74ACT299PC_Q Fairchild Semiconductor, 74ACT299PC_Q Datasheet
74ACT299PC_Q
Specifications of 74ACT299PC_Q
Related parts for 74ACT299PC_Q
74ACT299PC_Q Summary of contents
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... N20A Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number. All packages are lead free per JEDEC: J-STD-020B standard. ©1988 Fairchild Semiconductor Corporation 74AC299, 74ACT299 Rev. 1.4.0 General Description The AC/ACT299 is an 8-bit universal shift/storage regis- ter with 3-STATE outputs ...
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... I/O pins in the high imped- ance state. In this condition the shift, hold, load and reset operations can still occur. The 3-STATE buffers are also disabled by HIGH signals on both S tion for a parallel load operation. ©1988 Fairchild Semiconductor Corporation 74AC299, 74ACT299 Rev. 1.4.0 Logic Symbols 0 Truth Table ...
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... Logic Diagram Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. ©1988 Fairchild Semiconductor Corporation 74AC299, 74ACT299 Rev. 1.4.0 3 www.fairchildsemi.com ...
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... Input Voltage I V Output Voltage O T Operating Temperature Minimum Input Edge Rate, AC Devices: V from 30 Minimum Input Edge Rate, ACT Devices: V from 0.8V to 2.0V ©1988 Fairchild Semiconductor Corporation 74AC299, 74ACT299 Rev. 1.4.0 Parameter Parameter , V @ 3.3V, 4.5V, 5. 4.5V, 5. Rating 0.5V to 7.0V 20mA 20mA 0. 0.5V CC ...
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... All outputs loaded; thresholds on input associated with output under test and I @ 3.0V are guaranteed to be less than or equal to the respective limit @ 5. Maximum test duration 2.0ms, one output loaded at a time. ©1988 Fairchild Semiconductor Corporation 74AC299, 74ACT299 Rev. 1.4 (V) Conditions Typ ...
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... OHD I Maximum Quiescent CC Supply Current I Maximum I/O OZT Leakage Current Notes: 4. All outputs loaded; thresholds on input associated with output under test. 5. Maximum test duration 2.0ms, one output loaded at a time. ©1988 Fairchild Semiconductor Corporation 74AC299, 74ACT299 Rev. 1.4 (V) Conditions Typ. CC 4 ...
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... Output Enable Time I/O PZH t Output Enable Time I/O PZL t Output Disable Time I/O PHZ t Output Disable Time I/O PLZ Note: 6. Voltage range 3.3 is 3.3V 0.3V. Voltage range 5.0 is 5.0V ©1988 Fairchild Semiconductor Corporation 74AC299, 74ACT299 Rev. 1.4 50pF L (6) V (V) Min. Typ. Max. CC 3.3 90 124 5 ...
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... Hold Time, HIGH or LOW Pulse Width, LOW Pulse Width, LOW W t Recovery Time REC Note: 7. Voltage range 3.3 is 3.3V 0.3V. Voltage range 5.0 is 5.0V ©1988 Fairchild Semiconductor Corporation 74AC299, 74ACT299 Rev. 1.4 50pF L (7) V (V) Typ. Guaranteed Minimum CC 3.3 3.0 8.0 5 ...
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... CP Pulse Width, HIGH or LOW Pulse Width, LOW W t Recovery Time REC Note 9. Voltage range 5.0 is 5.0V 0.5V. Capacitance Symbol Parameter C Input Capacitance IN C Power Dissipation Capacitance PD ©1988 Fairchild Semiconductor Corporation 74AC299, 74ACT299 Rev. 1.4 50pF L (8) V (V) Min. Typ. Max. CC 5.0 120 170 or Q 5.0 4.0 8 ...
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... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifi ...
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... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifi ...
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... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifi ...
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... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifi ...
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... TRADEMARKS The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not intended exhaustive list of all such trademarks. ® ACEx Build it Now™ CorePLUS™ CROSSVOLT™ CTL™ Current Transfer Logic™ ...