XRT91L32ES Exar, XRT91L32ES Datasheet - Page 17

• Manufacturer Part Number: XRT91L32ES
• Description: LIN Transceivers SONET SDH 8 bit TRANCEIVER
• Manufacturer: Exar

Specifications of XRT91L32ES

• Product Category: LIN Transceivers
• Rohs: yes

xr
REV. 1.0.2
Optionally, the internal CDR unit can be disabled and bypassed in lieu of an externally recovered clock.
Asserting the CDRDIS "High" disables the internal Clock and Data Recovery unit and the received serial data
bypasses the integrated CDR block. RXINP/N is then sampled on the rising edge of the externally recovered
differential clock XRXCLKIP/N coming from the optical module or an external clock recovery unit. Figure 5
shows the possible internal paths of the recovered clock and data.
F
REF
REF
REF
REF
TOL
OCLK
OCLK
2.3.1
IGURE
JIT
N
DUTY
JIT
JIT
TOL
Jitter specification is defined using a 12kHz to 1.3/5MHz LP-HP single-pole filter.
1
2
These reference clock jitter limits are required for the outputs to meet SONET system level jitter requirements (<10 mUI
Required to meet SONET output frequency stability requirements.
FREQ
DUTY
AME
Parallel DATA
Div by 8 CLOCK
5. I
CDRDIS
Internal Clock and Data Recovery Bypass
NTERNAL
Reference clock duty cycle
Reference clock jitter (rms) with 19.44 MHz reference
Reference clock jitter (rms) with 77.76 MHz reference
Reference clock frequency tolerance
Input jitter tolerance with 1 MHz < f < 20 MHz PRBS pattern
Frequency output
Clock output duty cycle
8
C
LOCK AND
T
ABLE
6: C
D
SIPO
ATA
LOCK AND
R
P
ECOVERY
ARAMETER
2
CLOCK
DATA
STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER
D
ATA
B
YPASS
R
15
ECOVERY
1
1
U
Clk
Data
NIT
CDR
P
ERFORMANCE
620
M
-20
0.3
40
40
IN
T
0.4
YP
XRXCLKIP
XRXCLKIN
RXIP
RXIN
M
+20
624
60
13
60
5
AX
XRT91L32
rms
).
U
MHz
ppm
NITS
%
ps
ps
UI
%